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| author | Devin Heitmueller <dheitmueller@kernellabs.com> | 2009-05-16 22:09:28 +0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-06-16 23:21:08 +0200 |
| commit | d18e2fda7133287bf8a81809816e646cf17c332e (patch) | |
| tree | d42b038af4ed02b31add846f6731dfabb5d78123 /drivers/media/video/em28xx/em28xx-reg.h | |
| parent | V4L/DVB (11808): au0828: get rid of debug printk that was causing compile fai... (diff) | |
| download | linux-d18e2fda7133287bf8a81809816e646cf17c332e.tar.xz linux-d18e2fda7133287bf8a81809816e646cf17c332e.zip | |
V4L/DVB (11810): em28xx: properly set packet size based on the device's eeprom configuration.
The em28xx actually has a register that tells the driver what the maximum
packet size is (based on a value programmed into the eeprom). Make use of
that register instead of assuming a hardcoded value of 564 (since 564 is not
correct for devices that do QAM such as the KWorld 340u).
Note that for now the em2874 code isn't there, falling back to the 564 value,
however this is not a problem since there are not any em2874 based devices in
the current v4l-dvb tree).
Thanks to Jarod Wilson for detecting the initial problem and figuring out that
the isoc configuration was wrong for his device.
Cc: Jarod Wilson <jarod@wilsonet.com>
Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/em28xx/em28xx-reg.h')
| -rw-r--r-- | drivers/media/video/em28xx/em28xx-reg.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h index 24e39c56811e..a2676d63cfd0 100644 --- a/drivers/media/video/em28xx/em28xx-reg.h +++ b/drivers/media/video/em28xx/em28xx-reg.h @@ -27,6 +27,22 @@ #define EM28XX_CHIPCFG_AC97 0x10 #define EM28XX_CHIPCFG_AUDIOMASK 0x30 +#define EM28XX_R01_CHIPCFG2 0x01 + +/* em28xx Chip Configuration 2 0x01 */ +#define EM28XX_CHIPCFG2_TS_PRESENT 0x10 +#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK 0x0c /* bits 3-2 */ +#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_1MF 0x00 +#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_2MF 0x04 +#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_4MF 0x08 +#define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_8MF 0x0c +#define EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK 0x03 /* bits 0-1 */ +#define EM28XX_CHIPCFG2_TS_PACKETSIZE_188 0x00 +#define EM28XX_CHIPCFG2_TS_PACKETSIZE_376 0x01 +#define EM28XX_CHIPCFG2_TS_PACKETSIZE_564 0x02 +#define EM28XX_CHIPCFG2_TS_PACKETSIZE_752 0x03 + + /* GPIO/GPO registers */ #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */ #define EM28XX_R08_GPIO 0x08 /* em2820 or upper */ |