diff options
| author | Hyunwoong Kim <khw0178.kim@samsung.com> | 2010-12-22 04:56:05 +0100 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-03-22 00:31:39 +0100 |
| commit | 10038bea7a729bcb8c51a2c856f5b58b33646d65 (patch) | |
| tree | d0a71cc5c53961fbea0aea2975fe3f38bfd12cf6 /drivers/media/video/s5p-fimc/regs-fimc.h | |
| parent | [media] s5p-fimc: Add control of the external sensor clock (diff) | |
| download | linux-10038bea7a729bcb8c51a2c856f5b58b33646d65.tar.xz linux-10038bea7a729bcb8c51a2c856f5b58b33646d65.zip | |
[media] s5p-fimc: fix the value of YUV422 1-plane formats
Some color formats are mismatched in s5p-fimc driver.
CIOCTRL[1:0], order422_out, should be set 2b'00 not 2b'11
to use V4L2_PIX_FMT_YUYV. Because in V4L2 standard V4L2_PIX_FMT_YUYV means
"start + 0: Y'00 Cb00 Y'01 Cr00 Y'02 Cb01 Y'03 Cr01". According to datasheet
2b'00 is right value for V4L2_PIX_FMT_YUYV.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/video/s5p-fimc/regs-fimc.h')
| -rw-r--r-- | drivers/media/video/s5p-fimc/regs-fimc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h index 74ca705df765..fe19b4b0fb6a 100644 --- a/drivers/media/video/s5p-fimc/regs-fimc.h +++ b/drivers/media/video/s5p-fimc/regs-fimc.h @@ -98,8 +98,8 @@ #define S5P_CIOCTRL 0x4c #define S5P_CIOCTRL_ORDER422_MASK (3 << 0) #define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0) -#define S5P_CIOCTRL_ORDER422_YCRYCB (1 << 0) -#define S5P_CIOCTRL_ORDER422_CBYCRY (2 << 0) +#define S5P_CIOCTRL_ORDER422_CBYCRY (1 << 0) +#define S5P_CIOCTRL_ORDER422_YCRYCB (2 << 0) #define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0) #define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2) #define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3) @@ -223,10 +223,10 @@ #define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13) #define S5P_MSCTRL_FLIP_180 (3 << 13) #define S5P_MSCTRL_ORDER422_SHIFT 4 -#define S5P_MSCTRL_ORDER422_CRYCBY (0 << 4) -#define S5P_MSCTRL_ORDER422_YCRYCB (1 << 4) -#define S5P_MSCTRL_ORDER422_CBYCRY (2 << 4) -#define S5P_MSCTRL_ORDER422_YCBYCR (3 << 4) +#define S5P_MSCTRL_ORDER422_YCBYCR (0 << 4) +#define S5P_MSCTRL_ORDER422_CBYCRY (1 << 4) +#define S5P_MSCTRL_ORDER422_YCRYCB (2 << 4) +#define S5P_MSCTRL_ORDER422_CRYCBY (3 << 4) #define S5P_MSCTRL_ORDER422_MASK (3 << 4) #define S5P_MSCTRL_INPUT_EXTCAM (0 << 3) #define S5P_MSCTRL_INPUT_MEMORY (1 << 3) |