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author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2020-07-06 20:35:27 +0200 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-07-19 08:30:46 +0200 |
commit | 47bed3fbe8a0ced333fda22e4a0a29342782c793 (patch) | |
tree | f597ab6da38a129398422b5b184102db1a4c6d0f /drivers/media | |
parent | media: ti-vpe: cal: Index IRQ registersstarting at 0 (diff) | |
download | linux-47bed3fbe8a0ced333fda22e4a0a29342782c793.tar.xz linux-47bed3fbe8a0ced333fda22e4a0a29342782c793.zip |
media: ti-vpe: cal: Merge all status variables in IRQ handler
The cal_irq() function reads three IRQ status registers and stores their
values in three different variables. As each value is processed right
after reading the corresponding register, a single variable is enough.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media')
-rw-r--r-- | drivers/media/platform/ti-vpe/cal.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index b04d8cb86977..2aa28af7cad3 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1206,19 +1206,19 @@ static irqreturn_t cal_irq(int irq_cal, void *data) struct cal_dev *dev = (struct cal_dev *)data; struct cal_ctx *ctx; struct cal_dmaqueue *dma_q; - u32 irqst0, irqst1, irqst2; + u32 status; - irqst0 = reg_read(dev, CAL_HL_IRQSTATUS(0)); - if (irqst0) { + status = reg_read(dev, CAL_HL_IRQSTATUS(0)); + if (status) { int i; - reg_write(dev, CAL_HL_IRQSTATUS(0), irqst0); + reg_write(dev, CAL_HL_IRQSTATUS(0), status); - if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK) + if (status & CAL_HL_IRQ_OCPO_ERR_MASK) dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n"); for (i = 0; i < 2; ++i) { - if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) { + if (status & CAL_HL_IRQ_CIO_MASK(i)) { u32 cio_stat = reg_read(dev, CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); @@ -1232,15 +1232,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data) } /* Check which DMA just finished */ - irqst1 = reg_read(dev, CAL_HL_IRQSTATUS(1)); - if (irqst1) { + status = reg_read(dev, CAL_HL_IRQSTATUS(1)); + if (status) { int i; /* Clear Interrupt status */ - reg_write(dev, CAL_HL_IRQSTATUS(1), irqst1); + reg_write(dev, CAL_HL_IRQSTATUS(1), status); for (i = 0; i < 2; ++i) { - if (isportirqset(irqst1, i)) { + if (isportirqset(status, i)) { ctx = dev->ctx[i]; spin_lock(&ctx->slock); @@ -1255,15 +1255,15 @@ static irqreturn_t cal_irq(int irq_cal, void *data) } /* Check which DMA just started */ - irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2)); - if (irqst2) { + status = reg_read(dev, CAL_HL_IRQSTATUS(2)); + if (status) { int i; /* Clear Interrupt status */ - reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); + reg_write(dev, CAL_HL_IRQSTATUS(2), status); for (i = 0; i < 2; ++i) { - if (isportirqset(irqst2, i)) { + if (isportirqset(status, i)) { ctx = dev->ctx[i]; dma_q = &ctx->vidq; |