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authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2013-04-23 21:21:26 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-05-21 19:11:56 +0200
commit3edad321b1bd2e6c8b5f38146c115c8982438f06 (patch)
treed58e2393d49e1f1af0797778d1ed87fb6780e8dc /drivers/memory/Makefile
parentuio/uio_cif: Use module_pci_driver to register driver (diff)
downloadlinux-3edad321b1bd2e6c8b5f38146c115c8982438f06.tar.xz
linux-3edad321b1bd2e6c8b5f38146c115c8982438f06.zip
drivers: memory: Introduce Marvell EBU Device Bus driver
Marvell EBU SoCs such as Armada 370/XP, Orion5x (88f5xxx) and Discovery (mv78xx0) supports a Device Bus controller to access several kinds of memories and I/O devices (NOR, NAND, SRAM, FPGA). This commit adds a driver to handle this controller. So far only Armada 370, Armada XP and Discovery SoCs are supported. The driver must be registered through a device tree node; as explained in the binding document. For each child node in the device tree, this driver will: * set timing parameters * register a child device * setup an address decoding window, using the mbus driver Keep in mind the address decoding window setup is only a temporary hack. This code will be removed from this devbus driver as soon as a proper device tree binding for the mbus driver is added. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/memory/Makefile')
-rw-r--r--drivers/memory/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 9cce5d70ed52..969d923dad93 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,5 +6,6 @@ ifeq ($(CONFIG_DDR),y)
obj-$(CONFIG_OF) += of_memory.o
endif
obj-$(CONFIG_TI_EMIF) += emif.o
+obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o