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| author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-09 21:28:31 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-04-30 10:10:00 +0200 |
| commit | a8d502fd33484ed8c4acc6acae73918844ca6811 (patch) | |
| tree | c25a45b7d295e76825ccf602c41eebf7865cea9f /drivers/memory/Makefile | |
| parent | memory: tegra: Remove unused headers inclusions (diff) | |
| download | linux-a8d502fd33484ed8c4acc6acae73918844ca6811.tar.xz linux-a8d502fd33484ed8c4acc6acae73918844ca6811.zip | |
memory: tegra: Squash tegra20-mc into common tegra-mc driver
Tegra30+ has some minor differences in registers / bits layout compared
to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver
in a preparation for the upcoming MC hot reset controls implementation,
avoiding code duplication.
Note that this currently doesn't report the value of MC_GART_ERROR_REQ
because it is located within the GART register area and cannot be safely
accessed from the MC driver (this happens to work only by accident). The
proper solution is to integrate the GART driver with the MC driver, much
like is done for the Tegra SMMU, but that is an invasive change and will
be part of a separate patch series.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/Makefile')
| -rw-r--r-- | drivers/memory/Makefile | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index 66f55240830e..a01ab3e22f94 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -16,7 +16,6 @@ obj-$(CONFIG_OMAP_GPMC) += omap-gpmc.o obj-$(CONFIG_FSL_CORENET_CF) += fsl-corenet-cf.o obj-$(CONFIG_FSL_IFC) += fsl_ifc.o obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o -obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o obj-$(CONFIG_JZ4780_NEMC) += jz4780-nemc.o obj-$(CONFIG_MTK_SMI) += mtk-smi.o obj-$(CONFIG_DA8XX_DDRCTL) += da8xx-ddrctl.o |