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author | Dmitry Osipenko <digetx@gmail.com> | 2020-11-04 17:49:08 +0100 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-11-26 18:50:35 +0100 |
commit | 06f079816d4c4e43d4128f394ae249934a32dffd (patch) | |
tree | 972b94fdb2280d22cfe3a3b5e53c5b6efc51406a /drivers/memory/tegra/mc.h | |
parent | memory: tegra: Add missing latency allowness entry for Page Table Cache (diff) | |
download | linux-06f079816d4c4e43d4128f394ae249934a32dffd.tar.xz linux-06f079816d4c4e43d4128f394ae249934a32dffd.zip |
memory: tegra-mc: Add interconnect framework
Add common SoC-agnostic ICC framework which turns Tegra Memory Controller
into a memory interconnection provider. This allows us to use interconnect
API for tuning of memory configurations.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Link: https://lore.kernel.org/r/20201104164923.21238-33-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/memory/tegra/mc.h')
-rw-r--r-- | drivers/memory/tegra/mc.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index afa3ba45c9e6..33e40d600592 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -78,6 +78,20 @@ #define MC_TIMING_UPDATE BIT(0) +static inline u32 tegra_mc_scale_percents(u64 val, unsigned int percents) +{ + val = val * percents; + do_div(val, 100); + + return min_t(u64, val, U32_MAX); +} + +static inline struct tegra_mc * +icc_provider_to_tegra_mc(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_mc, provider); +} + static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) { return readl_relaxed(mc->regs + offset); @@ -115,4 +129,12 @@ extern const struct tegra_mc_soc tegra132_mc_soc; extern const struct tegra_mc_soc tegra210_mc_soc; #endif +/* + * These IDs are for internal use of Tegra ICC drivers. The ID numbers are + * chosen such that they don't conflict with the device-tree ICC node IDs. + */ +#define TEGRA_ICC_MC 1000 +#define TEGRA_ICC_EMC 1001 +#define TEGRA_ICC_EMEM 1002 + #endif /* MEMORY_TEGRA_MC_H */ |