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author | Dmitry Osipenko <digetx@gmail.com> | 2018-04-13 13:33:49 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2018-04-30 10:12:21 +0200 |
commit | 20e92462cdfb2772e9d784ec355c90b61ec10222 (patch) | |
tree | a03482c41058a5faa820ab6d2235b871bdffb939 /drivers/memory/tegra/mc.h | |
parent | memory: tegra: Squash tegra20-mc into common tegra-mc driver (diff) | |
download | linux-20e92462cdfb2772e9d784ec355c90b61ec10222.tar.xz linux-20e92462cdfb2772e9d784ec355c90b61ec10222.zip |
memory: tegra: Introduce memory client hot reset
In order to reset busy HW properly, memory controller needs to be
involved, otherwise it is possible to get corrupted memory or hang machine
if HW was reset during DMA. Introduce memory client 'hot reset' that will
be used for resetting of busy HW.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/mc.h')
-rw-r--r-- | drivers/memory/tegra/mc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index cdd6911f4079..01065f12ebeb 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -41,6 +41,8 @@ static inline void mc_writel(struct tegra_mc *mc, u32 value, writel(value, mc->regs + offset); } +extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common; + #ifdef CONFIG_ARCH_TEGRA_2x_SOC extern const struct tegra_mc_soc tegra20_mc_soc; #endif |