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authorDmitry Osipenko <digetx@gmail.com>2018-04-09 21:28:29 +0200
committerThierry Reding <treding@nvidia.com>2018-04-27 11:23:04 +0200
commit1c74d5c0de0c2cc29fef97a19251da2ad6f579bd (patch)
tree947043f811ee1f23df4060f0774228bae8add4b1 /drivers/memory/tegra/tegra114.c
parentmemory: tegra: Setup interrupts mask before requesting IRQ (diff)
downloadlinux-1c74d5c0de0c2cc29fef97a19251da2ad6f579bd.tar.xz
linux-1c74d5c0de0c2cc29fef97a19251da2ad6f579bd.zip
memory: tegra: Apply interrupts mask per SoC
Currently we are enabling handling of interrupts specific to Tegra124+ which happen to overlap with previous generations. Let's specify interrupts mask per SoC generation for consistency and in a preparation of squashing of Tegra20 driver into the common one that will enable handling of GART faults which may be undesirable by newer generations. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/tegra114.c')
-rw-r--r--drivers/memory/tegra/tegra114.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c
index b20e6e3e208e..7560b2f558a7 100644
--- a/drivers/memory/tegra/tegra114.c
+++ b/drivers/memory/tegra/tegra114.c
@@ -945,4 +945,6 @@ const struct tegra_mc_soc tegra114_mc_soc = {
.atom_size = 32,
.client_id_mask = 0x7f,
.smmu = &tegra114_smmu_soc,
+ .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION |
+ MC_INT_DECERR_EMEM,
};