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author | Dmitry Osipenko <digetx@gmail.com> | 2021-06-01 04:31:14 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2021-06-03 14:24:03 +0200 |
commit | f8c9670ffffedd91fb0935d414bb3d2d179ac356 (patch) | |
tree | f9deef6359aa87d2961120f2dc10018faebeda2e /drivers/memory/tegra/tegra20-emc.c | |
parent | memory: tegra: Enable compile testing for all drivers (diff) | |
download | linux-f8c9670ffffedd91fb0935d414bb3d2d179ac356.tar.xz linux-f8c9670ffffedd91fb0935d414bb3d2d179ac356.zip |
memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table()
Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
initialization.
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra/tegra20-emc.c')
-rw-r--r-- | drivers/memory/tegra/tegra20-emc.c | 48 |
1 files changed, 4 insertions, 44 deletions
diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index da8a0da8da79..a534197a5fb2 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -908,49 +908,6 @@ err_msg: return err; } -static int tegra_emc_opp_table_init(struct tegra_emc *emc) -{ - u32 hw_version = BIT(tegra_sku_info.soc_process_id); - struct opp_table *hw_opp_table; - int err; - - hw_opp_table = dev_pm_opp_set_supported_hw(emc->dev, &hw_version, 1); - err = PTR_ERR_OR_ZERO(hw_opp_table); - if (err) { - dev_err(emc->dev, "failed to set OPP supported HW: %d\n", err); - return err; - } - - err = dev_pm_opp_of_add_table(emc->dev); - if (err) { - if (err == -ENODEV) - dev_err(emc->dev, "OPP table not found, please update your device tree\n"); - else - dev_err(emc->dev, "failed to add OPP table: %d\n", err); - - goto put_hw_table; - } - - dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", - hw_version, clk_get_rate(emc->clk) / 1000000); - - /* first dummy rate-set initializes voltage state */ - err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk)); - if (err) { - dev_err(emc->dev, "failed to initialize OPP clock: %d\n", err); - goto remove_table; - } - - return 0; - -remove_table: - dev_pm_opp_of_remove_table(emc->dev); -put_hw_table: - dev_pm_opp_put_supported_hw(hw_opp_table); - - return err; -} - static void devm_tegra_emc_unset_callback(void *data) { tegra20_clk_set_emc_round_callback(NULL, NULL); @@ -1077,6 +1034,7 @@ static int tegra_emc_devfreq_init(struct tegra_emc *emc) static int tegra_emc_probe(struct platform_device *pdev) { + struct tegra_core_opp_params opp_params = {}; struct device_node *np; struct tegra_emc *emc; int irq, err; @@ -1122,7 +1080,9 @@ static int tegra_emc_probe(struct platform_device *pdev) if (err) return err; - err = tegra_emc_opp_table_init(emc); + opp_params.init_state = true; + + err = devm_tegra_core_dev_init_opp_table(&pdev->dev, &opp_params); if (err) return err; |