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author | Roger Quadros <rogerq@ti.com> | 2015-08-07 09:38:13 +0200 |
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committer | Roger Quadros <rogerq@ti.com> | 2016-04-15 10:55:28 +0200 |
commit | 9e6946215dbd9803e8b511928c9f61f3a49e2c58 (patch) | |
tree | 0c5e57d8bc130f40ad75763d4acec4c1ddc41ba5 /drivers/memory | |
parent | memory: omap-gpmc: Support WAIT pin edge interrupts (diff) | |
download | linux-9e6946215dbd9803e8b511928c9f61f3a49e2c58.tar.xz linux-9e6946215dbd9803e8b511928c9f61f3a49e2c58.zip |
memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs
GPMC_STATUS register is private to the GPMC module and must not be
accessed directly by NAND driver through the gpmc_regs.
They must use gpmc_omap_get_nand_ops() instead.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r-- | drivers/memory/omap-gpmc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index ea9c89747950..33d69b1e4c31 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -1081,7 +1081,7 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) { int i; - reg->gpmc_status = gpmc_base + GPMC_STATUS; + reg->gpmc_status = NULL; /* deprecated */ reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + |