summaryrefslogtreecommitdiffstats
path: root/drivers/memory
diff options
context:
space:
mode:
authorThierry Reding <treding@nvidia.com>2021-06-02 18:32:59 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>2021-06-03 21:49:41 +0200
commit0de93c698587cfaf1ec36d4c78fb9c6a76544390 (patch)
treeb60ebafc1e3feb457f8103310101178da2669d06 /drivers/memory
parentmemory: tegra: Make IRQ support opitonal (diff)
downloadlinux-0de93c698587cfaf1ec36d4c78fb9c6a76544390.tar.xz
linux-0de93c698587cfaf1ec36d4c78fb9c6a76544390.zip
memory: tegra: Only initialize reset controller if available
The memory controller hot resets are implemented in the BPMP on Tegra186 and later, so there's no need to provide an implementation via the memory controller driver. Conditionally register the reset controller only if needed. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210602163302.120041-10-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/tegra/mc.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 68c6797f2707..4aa17bdd6392 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -768,10 +768,11 @@ static int tegra_mc_probe(struct platform_device *pdev)
}
}
- err = tegra_mc_reset_setup(mc);
- if (err < 0)
- dev_err(&pdev->dev, "failed to register reset controller: %d\n",
- err);
+ if (mc->soc->reset_ops) {
+ err = tegra_mc_reset_setup(mc);
+ if (err < 0)
+ dev_err(&pdev->dev, "failed to register reset controller: %d\n", err);
+ }
err = tegra_mc_interconnect_setup(mc);
if (err < 0)