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authorFabrice Gasnier <fabrice.gasnier@st.com>2019-09-18 16:54:21 +0200
committerThierry Reding <thierry.reding@gmail.com>2019-09-21 03:25:10 +0200
commitc91e3234c6035baf5a79763cb4fcd5d23ce75c2b (patch)
treeff657840c6b1869f809e4d2b5afc5b7bbeee93bf /drivers/mfd/altera-a10sr.c
parentpwm: Ensure pwm_apply_state() doesn't modify the state argument (diff)
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pwm: stm32-lp: Add check in case requested period cannot be achieved
LPTimer can use a 32KHz clock for counting. It depends on clock tree configuration. In such a case, PWM output frequency range is limited. Although unlikely, nothing prevents user from requesting a PWM frequency above counting clock (32KHz for instance): - This causes (prd - 1) = 0xffff to be written in ARR register later in the apply() routine. This results in badly configured PWM period (and also duty_cycle). Add a check to report an error is such a case. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/mfd/altera-a10sr.c')
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