diff options
author | Doug Anderson <dianders@chromium.org> | 2014-04-30 19:44:07 +0200 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2014-06-03 09:11:48 +0200 |
commit | 9c0b54a120348813de16be935d2e8a3e0e8e4a8b (patch) | |
tree | 1973af48d563e00de799a59f41ebe94a69b90979 /drivers/mfd/cros_ec_spi.c | |
parent | mfd: cros_ec: spi: Make the cros_ec_spi timeout more reliable (diff) | |
download | linux-9c0b54a120348813de16be935d2e8a3e0e8e4a8b.tar.xz linux-9c0b54a120348813de16be935d2e8a3e0e8e4a8b.zip |
mfd: cros_ec: spi: Increase cros_ec_spi deadline from 5ms to 100ms
We're adding i2c tunneling to the list of things that goes over
cros_ec. i2c tunneling can be slooooooow, so increase our deadline to
100ms to account for that.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/cros_ec_spi.c')
-rw-r--r-- | drivers/mfd/cros_ec_spi.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c index 4f863c346547..0b8d32829166 100644 --- a/drivers/mfd/cros_ec_spi.c +++ b/drivers/mfd/cros_ec_spi.c @@ -39,14 +39,22 @@ #define EC_MSG_PREAMBLE_COUNT 32 /* - * We must get a response from the EC in 5ms. This is a very long - * time, but the flash write command can take 2-3ms. The EC command - * processing is currently not very fast (about 500us). We could - * look at speeding this up and making the flash write command a - * 'slow' command, requiring a GET_STATUS wait loop, like flash - * erase. - */ -#define EC_MSG_DEADLINE_MS 5 + * Allow for a long time for the EC to respond. We support i2c + * tunneling and support fairly long messages for the tunnel (249 + * bytes long at the moment). If we're talking to a 100 kHz device + * on the other end and need to transfer ~256 bytes, then we need: + * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms + * + * We'll wait 4 times that to handle clock stretching and other + * paranoia. + * + * It's pretty unlikely that we'll really see a 249 byte tunnel in + * anything other than testing. If this was more common we might + * consider having slow commands like this require a GET_STATUS + * wait loop. The 'flash write' command would be another candidate + * for this, clocking in at 2-3ms. + */ +#define EC_MSG_DEADLINE_MS 100 /* * Time between raising the SPI chip select (for the end of a |