diff options
| author | Quentin Schulz <quentin.schulz@free-electrons.com> | 2017-03-20 09:16:53 +0100 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2017-04-27 10:25:04 +0200 |
| commit | 976023701d1f1fda5e19983f38113bd67e881f64 (patch) | |
| tree | 3bf33206d084955b5f4547d64ffaf73729cda58f /drivers/mfd | |
| parent | mfd: axp20x: Add AC power supply cells for AXP22X PMICs (diff) | |
| download | linux-976023701d1f1fda5e19983f38113bd67e881f64.tar.xz linux-976023701d1f1fda5e19983f38113bd67e881f64.zip | |
mfd: axp20x: Add CHRG_CTRL1/2/3 to writeable regs for AXP20X/AXP22X
The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling
different battery charging settings such as the constant current charge
value.
The AXP22X also have a third register CHRG_CTRL3 which has settings for
battery charging too.
This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registers to the
list of writeable registers for AXP20X and AXP22X PMICs.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/axp20x.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 37643b1b7a43..5ba3b04cc9b1 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -68,6 +68,7 @@ static const struct regmap_access_table axp152_volatile_table = { static const struct regmap_range axp20x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), }; @@ -94,6 +95,7 @@ static const struct regmap_access_table axp20x_volatile_table = { /* AXP22x ranges are shared with the AXP809, as they cover the same range */ static const struct regmap_range axp22x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), }; |