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authorThor Thayer <thor.thayer@linux.intel.com>2019-04-04 16:36:35 +0200
committerBorislav Petkov <bp@suse.de>2019-04-10 20:50:25 +0200
commitb9c8172eedc1a8285c373564174a724311394472 (patch)
tree8c505c39ee687baa4f23e7e0e7fbe70862b6be6c /drivers/misc/aspeed-lpc-ctrl.c
parentEDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC call (diff)
downloadlinux-b9c8172eedc1a8285c373564174a724311394472.tar.xz
linux-b9c8172eedc1a8285c373564174a724311394472.zip
Documentation: dt: edac: Fix Stratix10 IRQ bindings
Fix Stratix10 ECC bindings to specify only the single bit error. On Stratix10 double bit errors are handled as SErrors instead of interrupts. Indicate the differences between the ARM64 and ARM32 EDAC architecture in the bindings. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Rob Herring <robh@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: mchehab@kernel.org Link: https://lkml.kernel.org/r/1554388597-28019-2-git-send-email-thor.thayer@linux.intel.com
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