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authorIan Munsie <imunsie@au1.ibm.com>2016-07-13 23:17:09 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2016-07-14 12:27:02 +0200
commitcbce0917e2e47d4bf5aa3b5fd6b1247f33e1a126 (patch)
tree87cdecbe2a4a7d35667c144b8ee87a9a6510c41e /drivers/misc/cxl/base.c
parentcxl: Add kernel APIs to get & set the max irqs per context (diff)
downloadlinux-cbce0917e2e47d4bf5aa3b5fd6b1247f33e1a126.tar.xz
linux-cbce0917e2e47d4bf5aa3b5fd6b1247f33e1a126.zip
cxl: Add preliminary workaround for CX4 interrupt limitation
The Mellanox CX4 has a hardware limitation where only 4 bits of the AFU interrupt number can be passed to the XSL when sending an interrupt, limiting it to only 15 interrupts per context (AFU interrupt number 0 is invalid). In order to overcome this, we will allocate additional contexts linked to the default context as extra address space for the extra interrupts - this will be implemented in the next patch. This patch adds the preliminary support to allow this, by way of adding a linked list in the context structure that we use to keep track of the contexts dedicated to interrupts, and an API to simultaneously iterate over the related context structures, AFU interrupt numbers and hardware interrupt numbers. The point of using a single API to iterate these is to hide some of the details of the iteration from external code, and to reduce the number of APIs that need to be exported via base.c to allow built in code to call. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl/base.c')
-rw-r--r--drivers/misc/cxl/base.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index e1e80cb99ad9..fe90f895bb10 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -141,6 +141,23 @@ void cxl_pci_disable_device(struct pci_dev *dev)
}
EXPORT_SYMBOL_GPL(cxl_pci_disable_device);
+int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq)
+{
+ int ret;
+ struct cxl_calls *calls;
+
+ calls = cxl_calls_get();
+ if (!calls)
+ return -EBUSY;
+
+ ret = calls->cxl_next_msi_hwirq(pdev, ctx, afu_irq);
+
+ cxl_calls_put(calls);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
+
static int __init cxl_base_init(void)
{
struct device_node *np;