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author | Frederic Barrat <fbarrat@linux.vnet.ibm.com> | 2016-02-24 18:27:51 +0100 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-02-29 11:36:00 +0100 |
commit | 923adb1646d5ba739d2a1e63ee20d60574d9da8e (patch) | |
tree | 21011aeacc61696e7b7897c57e888a1057278dce /drivers/misc/cxl | |
parent | powerpc/mm/hash: Clear the invalid slot information correctly (diff) | |
download | linux-923adb1646d5ba739d2a1e63ee20d60574d9da8e.tar.xz linux-923adb1646d5ba739d2a1e63ee20d60574d9da8e.zip |
cxl: Fix PSL timebase synchronization detection
The PSL timebase synchronization is seemingly failing for
configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver
shows the following trace in dmesg:
PSL: Timebase sync: giving up!
The PSL timebase register is actually syncing correctly, but the cxl
driver is not detecting it. Fix is to use the proper timebase-to-time
conversion.
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Cc: <stable@vger.kernel.org> # 4.3+
Acked-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc/cxl')
-rw-r--r-- | drivers/misc/cxl/pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index 4c1903f781fc..0c6c17a1c59e 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c @@ -415,7 +415,7 @@ static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev) delta = mftb() - psl_tb; if (delta < 0) delta = -delta; - } while (cputime_to_usecs(delta) > 16); + } while (tb_to_ns(delta) > 16000); return 0; } |