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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-09-05 08:04:07 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-09-05 08:04:07 +0200
commitfbc1ec2efe665c07c8c71f9f19edb018f7984107 (patch)
treee7df9dac12c640a83ce8859300e061f1f8913ecd /drivers/misc/mei/hw-me.c
parentnvmem: rockchip-efuse: add rk3399-efuse support (diff)
parentLinux 4.8-rc5 (diff)
downloadlinux-fbc1ec2efe665c07c8c71f9f19edb018f7984107.tar.xz
linux-fbc1ec2efe665c07c8c71f9f19edb018f7984107.zip
Merge 4.8-rc5 into char-misc-next
We want the fixes in here for merging and testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/mei/hw-me.c')
-rw-r--r--drivers/misc/mei/hw-me.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index c2d70d2dd112..56c2101e80ad 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -1266,8 +1266,14 @@ static bool mei_me_fw_type_nm(struct pci_dev *pdev)
static bool mei_me_fw_type_sps(struct pci_dev *pdev)
{
u32 reg;
- /* Read ME FW Status check for SPS Firmware */
- pci_read_config_dword(pdev, PCI_CFG_HFS_1, &reg);
+ unsigned int devfn;
+
+ /*
+ * Read ME FW Status register to check for SPS Firmware
+ * The SPS FW is only signaled in pci function 0
+ */
+ devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
+ pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg);
trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
/* if bits [19:16] = 15, running SPS Firmware */
return (reg & 0xf0000) == 0xf0000;