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authorRui Feng <rui_feng@realsil.com.cn>2020-11-03 10:54:38 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2020-11-16 11:59:29 +0100
commitc28e3fb28f87cc0dba915f1303f4d018686363b8 (patch)
tree07478e9e2957b26aa24b40f238a885e5d13e00c7 /drivers/misc
parentmmc: rtsx: Add test mode for RTS5261 (diff)
downloadlinux-c28e3fb28f87cc0dba915f1303f4d018686363b8.tar.xz
linux-c28e3fb28f87cc0dba915f1303f4d018686363b8.zip
misc: rtsx: Fix OCP function for RTS5261
This patch fix the bug that when there is over current but reader can't enable OCP. Signed-off-by: Rui Feng <rui_feng@realsil.com.cn> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/1604397278-2815-1-git-send-email-rui_feng@realsil.com.cn Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/cardreader/rts5261.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/misc/cardreader/rts5261.c b/drivers/misc/cardreader/rts5261.c
index 536c90d4fd76..531bbaed7a12 100644
--- a/drivers/misc/cardreader/rts5261.c
+++ b/drivers/misc/cardreader/rts5261.c
@@ -272,6 +272,9 @@ static void rts5261_enable_ocp(struct rtsx_pcr *pcr)
u8 val = 0;
val = SD_OCP_INT_EN | SD_DETECT_EN;
+ rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0,
+ RTS5261_LDO1_OCP_EN | RTS5261_LDO1_OCP_LMT_EN,
+ RTS5261_LDO1_OCP_EN | RTS5261_LDO1_OCP_LMT_EN);
rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val);
}
@@ -340,7 +343,7 @@ static void rts5261_clear_ocpstat(struct rtsx_pcr *pcr)
rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val);
- udelay(10);
+ udelay(1000);
rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0);
}
@@ -353,9 +356,9 @@ static void rts5261_process_ocp(struct rtsx_pcr *pcr)
rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat);
if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
+ rts5261_clear_ocpstat(pcr);
rts5261_card_power_off(pcr, RTSX_SD_CARD);
rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0);
- rts5261_clear_ocpstat(pcr);
pcr->ocp_stat = 0;
}
@@ -513,6 +516,7 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
rtsx_pci_write_register(pcr, PETXCFG,
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
+ rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL,
FORCE_PM_CONTROL | FORCE_PM_VALUE, FORCE_PM_CONTROL);