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authorIan Munsie <imunsie@au1.ibm.com>2016-07-13 23:17:02 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2016-07-14 12:26:35 +0200
commit48b3adf33459c1c42766d9c2068a592216fe7812 (patch)
tree315d6af3ce690bcace65d8ad10a84868f888e1f9 /drivers/misc
parentcxl: Add cxl_slot_is_supported API (diff)
downloadlinux-48b3adf33459c1c42766d9c2068a592216fe7812.tar.xz
linux-48b3adf33459c1c42766d9c2068a592216fe7812.zip
cxl: Enable bus mastering for devices using CAPP DMA mode
Devices that use CAPP DMA mode (such as the Mellanox CX4) require bus master to be enabled in order for the CAPI traffic to flow. This should be harmless to enable for other cxl devices, so unconditionally enable it in the adapter init flow. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/cxl/pci.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 6ac6b05f41a4..deef9c75e73a 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1264,6 +1264,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev)))
goto err;
+ /* Required for devices using CAPP DMA mode, harmless for others */
+ pci_set_master(dev);
+
if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
goto err;