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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-21 23:14:47 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-21 23:14:47 +0200
commit3a26172437bb5ecdf6921e3ae24730ef37d3c860 (patch)
tree79b9aee78c58d0138ddf3f5c45ca3fcf35e07958 /drivers/misc
parentMerge tag 'misc-habanalabs-next-2019-04-19' of git://people.freedesktop.org/~... (diff)
parentLinux 5.1-rc6 (diff)
downloadlinux-3a26172437bb5ecdf6921e3ae24730ef37d3c860.tar.xz
linux-3a26172437bb5ecdf6921e3ae24730ef37d3c860.zip
Merge 5.1-rc6 into char-misc-next
We want the fixes, and this resolves a merge error in the fastrpc driver. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/fastrpc.c7
-rw-r--r--drivers/misc/habanalabs/goya/goya.c9
2 files changed, 10 insertions, 6 deletions
diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
index c4cc8e53243d..98603e235cf0 100644
--- a/drivers/misc/fastrpc.c
+++ b/drivers/misc/fastrpc.c
@@ -1315,6 +1315,7 @@ static int fastrpc_cb_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
int i, sessions = 0;
unsigned long flags;
+ int rc;
cctx = dev_get_drvdata(dev->parent);
if (!cctx)
@@ -1344,7 +1345,11 @@ static int fastrpc_cb_probe(struct platform_device *pdev)
}
cctx->sesscount++;
spin_unlock_irqrestore(&cctx->lock, flags);
- dma_set_mask(dev, DMA_BIT_MASK(32));
+ rc = dma_set_mask(dev, DMA_BIT_MASK(32));
+ if (rc) {
+ dev_err(dev, "32-bit DMA enable failed\n");
+ return rc;
+ }
return 0;
}
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 5100dfbf3acc..bde11fc2c251 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -1447,12 +1447,11 @@ static void goya_init_golden_registers(struct hl_device *hdev)
/*
* Workaround for H2 #HW-23 bug
- * Set DMA max outstanding read requests to 240 on DMA CH 1. Set it
- * to 16 on KMD DMA
- * We need to limit only these DMAs because the user can only read
+ * Set DMA max outstanding read requests to 240 on DMA CH 1.
+ * This limitation is still large enough to not affect Gen4 bandwidth.
+ * We need to only limit that DMA channel because the user can only read
* from Host using DMA CH 1
*/
- WREG32(mmDMA_CH_0_CFG0, 0x0fff0010);
WREG32(mmDMA_CH_1_CFG0, 0x0fff00F0);
WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020);
@@ -3343,7 +3342,7 @@ static int goya_validate_dma_pkt_mmu(struct hl_device *hdev,
* WA for HW-23.
* We can't allow user to read from Host using QMANs other than 1.
*/
- if (parser->hw_queue_id > GOYA_QUEUE_ID_DMA_1 &&
+ if (parser->hw_queue_id != GOYA_QUEUE_ID_DMA_1 &&
hl_mem_area_inside_range(le64_to_cpu(user_dma_pkt->src_addr),
le32_to_cpu(user_dma_pkt->tsize),
hdev->asic_prop.va_space_host_start_address,