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authorPeter Chen <peter.chen@nxp.com>2017-05-17 17:32:02 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-05-18 15:19:41 +0200
commit6a29beef9d1b16c762e469d77e28c3de3f5c3dbb (patch)
tree4b2f2bfa6240cd2bcf1f2d69ff14a04aee80c987 /drivers/misc
parentusb: host: xhci-mem: allocate zeroed Scratchpad Buffer (diff)
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usb: host: xhci-ring: don't need to clear interrupt pending for MSI enabled hcd
According to xHCI spec Figure 30: Interrupt Throttle Flow Diagram If PCI Message Signaled Interrupts (MSI or MSI-X) are enabled, then the assertion of the Interrupt Pending (IP) flag in Figure 30 generates a PCI Dword write. The IP flag is automatically cleared by the completion of the PCI write. the MSI enabled HCs don't need to clear interrupt pending bit, but hcd->irq = 0 doesn't equal to MSI enabled HCD. At some Dual-role controller software designs, it sets hcd->irq as 0 to avoid HCD requesting interrupt, and they want to decide when to call usb_hcd_irq by software. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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