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author | addy ke <addy.ke@rock-chips.com> | 2015-02-20 03:37:40 +0100 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-03-23 14:13:28 +0100 |
commit | 6d53200b51a57f50bc5a98b36bfcdb47483ad61a (patch) | |
tree | 50aca26b6811f2bcad9a8f075189ebe1b8db6bf2 /drivers/mmc/host/dw_mmc.c | |
parent | mmc: dw_mmc: exynos: Support eMMC's HS400 mode (diff) | |
download | linux-6d53200b51a57f50bc5a98b36bfcdb47483ad61a.tar.xz linux-6d53200b51a57f50bc5a98b36bfcdb47483ad61a.zip |
mmc: dw_mmc: rockchip: add support MMC_CAP_RUNTIME_RESUME capability
To support HS200 and UHS mode, mmc core will call init_card() to
execute tuning:
- sdio: init_card can be executed at runtime resume.
- sd and mmc: init_card can be executed at resume or runtime resume,
which depends on MMC_CAP_RUNTIME_RESUME capability.
On rk3288 SoC, host will get DRTO interrupt when host send command
to read tuning data. This will spend more than 111ms:
drto_ms = drto_clks * 1000 / bus_hz = 111ms.
And the total tuning time will be more than 400ms.
So we should add MMC_CAP_RUNTIME_RESUME capability to execute tuning
at runtime resume. Only if we do so, can we pass resume test.
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/dw_mmc.c')
0 files changed, 0 insertions, 0 deletions