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author | Sahitya Tummala <stummala@codeaurora.org> | 2010-12-08 10:33:07 +0100 |
---|---|---|
committer | David Brown <davidb@codeaurora.org> | 2010-12-20 21:28:32 +0100 |
commit | 0c521ccbd0c9ad5623ff9b37b20b3ff9d4ad65a7 (patch) | |
tree | 5cd3b61994a3891ec2ceff729ac33eea35ae205e /drivers/mmc/host/msm_sdcc.c | |
parent | mmc: msm_sdcc: Fix bug in PIO mode when data size is not word aligned (diff) | |
download | linux-0c521ccbd0c9ad5623ff9b37b20b3ff9d4ad65a7.tar.xz linux-0c521ccbd0c9ad5623ff9b37b20b3ff9d4ad65a7.zip |
mmc: msm_sdcc: Check for only DATA_END interrupt to end a request
The current code checks for both DATA_END and DATA_BLK_END bits in
MCI_STATUS register and ends a request only if both are set at a time.
The hardware doesn't always set DATA_BLK_END when DATA_END is set.
But DATA_END status itself is sufficient condition from hardware that
data transfer is done and hence, check for only DATA_END interrupt in
software to end a request.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'drivers/mmc/host/msm_sdcc.c')
-rw-r--r-- | drivers/mmc/host/msm_sdcc.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c index 9badc51bc4db..5decfd0bd61d 100644 --- a/drivers/mmc/host/msm_sdcc.c +++ b/drivers/mmc/host/msm_sdcc.c @@ -190,7 +190,7 @@ static void msmsdcc_stop_data(struct msmsdcc_host *host) { host->curr.data = NULL; - host->curr.got_dataend = host->curr.got_datablkend = 0; + host->curr.got_dataend = 0; } uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host) @@ -277,8 +277,7 @@ msmsdcc_dma_complete_tlet(unsigned long data) host->dma.sg = NULL; host->dma.busy = 0; - if ((host->curr.got_dataend && host->curr.got_datablkend) - || mrq->data->error) { + if (host->curr.got_dataend || mrq->data->error) { /* * If we've already gotten our DATAEND / DATABLKEND @@ -506,7 +505,6 @@ msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data, host->curr.xfer_remain = host->curr.xfer_size; host->curr.data_xfered = 0; host->curr.got_dataend = 0; - host->curr.got_datablkend = 0; memset(&host->pio, 0, sizeof(host->pio)); @@ -827,14 +825,10 @@ msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status, if (!host->curr.got_dataend && (status & MCI_DATAEND)) host->curr.got_dataend = 1; - if (!host->curr.got_datablkend && (status & MCI_DATABLOCKEND)) - host->curr.got_datablkend = 1; - /* * If DMA is still in progress, we complete via the completion handler */ - if (host->curr.got_dataend && host->curr.got_datablkend && - !host->dma.busy) { + if (host->curr.got_dataend && !host->dma.busy) { /* * There appears to be an issue in the controller where * if you request a small block transfer (< fifo size), @@ -871,8 +865,7 @@ msmsdcc_irq(int irq, void *dev_id) do { status = msmsdcc_readl(host, MMCISTATUS); - status &= (msmsdcc_readl(host, MMCIMASK0) | - MCI_DATABLOCKENDMASK); + status &= msmsdcc_readl(host, MMCIMASK0); msmsdcc_writel(host, status, MMCICLEAR); if (status & MCI_SDIOINTR) |