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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2018-11-23 04:15:37 +0100 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-12-17 08:26:24 +0100 |
| commit | 48e304cc1970b65f43c0d2f82aaf48285f0eccd2 (patch) | |
| tree | cd7a239f97a279cacd664202a9e3f5ddfb74caa4 /drivers/mmc/host/sdhci-esdhc.h | |
| parent | mmc: sdhci-of-esdhc: temporary fixup for eMMC HS400 issue (diff) | |
| download | linux-48e304cc1970b65f43c0d2f82aaf48285f0eccd2.tar.xz linux-48e304cc1970b65f43c0d2f82aaf48285f0eccd2.zip | |
mmc: sdhci-of-esdhc: workaround for unreliable pulse width detection
This was a SoC issue on LX2160A Rev1.0.
eSDHC_DLLCFG1[DLL_PD_PULSE_STRETCH_SEL] must be set to 0 to
get 4 delay cells in the pulse width detection logic for eMMC
HS400 mode. Otherwise it would cause unexpected HS400 issue.
This patch is to clear this bit always for affected SoC when
reset for all, since this bit doesn't affect other speed modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index 721a635b10e7..39dbbd6eaf28 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -78,6 +78,10 @@ #define ESDHC_DLL_ENABLE 0x80000000 #define ESDHC_DLL_FREQ_SEL 0x08000000 +/* DLL Config 1 Register */ +#define ESDHC_DLLCFG1 0x164 +#define ESDHC_DLL_PD_PULSE_STRETCH_SEL 0x80000000 + /* DLL Status 0 Register */ #define ESDHC_DLLSTAT0 0x170 #define ESDHC_DLL_STS_SLV_LOCK 0x08000000 |