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| author | yangbo lu <yangbo.lu@nxp.com> | 2017-04-20 10:14:40 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-04-24 21:42:25 +0200 |
| commit | 19c3a0ef65adf090cb592dfe3e575f40322c88d8 (patch) | |
| tree | bdff42cb2935f67f26222b2d0ee6262ae0d71ed1 /drivers/mmc/host/sdhci-esdhc.h | |
| parent | mmc: sdhci-pci: Allow for 3 bytes from Intel DSM (diff) | |
| download | linux-19c3a0ef65adf090cb592dfe3e575f40322c88d8.tar.xz linux-19c3a0ef65adf090cb592dfe3e575f40322c88d8.zip | |
mmc: sdhci-of-esdhc: add peripheral clock support
eSDHC could select peripheral clock or platform clock as clock source by
the PCS bit of eSDHC Control Register, and this bit couldn't be reset by
software reset for all. In default, the platform clock is used. But we have
to use peripheral clock since it has a higher frequency to support eMMC
HS200 mode and SD UHS-I mode. This patch is to add peripheral clock support
and use it instead of platform clock if it's declared in eSDHC dts node.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-esdhc.h')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index ece8b37e51dd..5343fc062e22 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -54,6 +54,7 @@ /* Control Register for DMA transfer */ #define ESDHC_DMA_SYSCTL 0x40c +#define ESDHC_PERIPHERAL_CLK_SEL 0x00080000 #define ESDHC_DMA_SNOOP 0x00000040 #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */ |