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authorZhangfei Gao <zgao6@marvell.com>2010-08-20 20:02:36 +0200
committerChris Ball <cjb@laptop.org>2010-10-23 15:11:14 +0200
commitc4687d5f601be3f928b815b46964f7426c31aec7 (patch)
treeb58c75fd2e7615f6e34637665633b55f02f2d171 /drivers/mmc/host/sdhci.h
parentmmc: SDHC 3.0: support 10-bit divided clock mode (diff)
downloadlinux-c4687d5f601be3f928b815b46964f7426c31aec7.tar.xz
linux-c4687d5f601be3f928b815b46964f7426c31aec7.zip
mmc: SDHC 3.0: Base clock frequency change in spec 3.0
SDHC Spec 3.0: Capabilities Register bits[15-08] are Base Clock Frequency 1.0/2.0: Capabilities Register bits[13-08] are Base Clock Frequency Signed-off-by: Zhangfei Gao <zgao6@marvell.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Matt Fleming <matt@console-pimps.org> Cc: Michal Miroslaw <mirqus@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to '')
-rw-r--r--drivers/mmc/host/sdhci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 950d4fd90072..ae28a310a6a1 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -144,6 +144,7 @@
#define SDHCI_TIMEOUT_CLK_SHIFT 0
#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080
#define SDHCI_CLOCK_BASE_MASK 0x00003F00
+#define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00
#define SDHCI_CLOCK_BASE_SHIFT 8
#define SDHCI_MAX_BLOCK_MASK 0x00030000
#define SDHCI_MAX_BLOCK_SHIFT 16