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authorHarald Welte <HaraldWelte@viatech.com>2009-06-18 16:53:38 +0200
committerPierre Ossman <pierre@ossman.eu>2009-06-21 21:00:59 +0200
commit557b06971b1f05cbadec2f376a305ee1954e9b0d (patch)
tree08f0fa936e2483afd3e91fc17277fcc45d5c3469 /drivers/mmc/host/sdhci.h
parents3cmci: fix dma configuration call (diff)
downloadlinux-557b06971b1f05cbadec2f376a305ee1954e9b0d.tar.xz
linux-557b06971b1f05cbadec2f376a305ee1954e9b0d.zip
sdhci: Specific quirk vor VIA SDHCI controller in VX855ES
The SDHCI controller found in the VX855ES requires 10ms delay between applying power and applying clock. This issue has been discovered and documented by the OLPC XO1.5 team. Signed-off-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Diffstat (limited to 'drivers/mmc/host/sdhci.h')
-rw-r--r--drivers/mmc/host/sdhci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 5d37dd94b53f..831ddf7dcb49 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -230,6 +230,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21)
/* Controller can only handle 1-bit data transfers */
#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22)
+/* Controller needs 10ms delay between applying power and clock */
+#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */