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authorLinus Walleij <linus.walleij@stericsson.com>2010-12-10 09:35:53 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-12-19 17:01:25 +0100
commit991a86e182203913b71607f0695955d7e23075d7 (patch)
treebeed051b190b860661af327c4f7e04ebbb2b3507 /drivers/mmc/host
parentARM: 6526/1: mmci: corrected calculation of clock div for ux500 (diff)
downloadlinux-991a86e182203913b71607f0695955d7e23075d7.tar.xz
linux-991a86e182203913b71607f0695955d7e23075d7.zip
ARM: 6530/1: mmci: partially revert clock divisor code
I misread the datasheet as if bypass mode was not available at all on the ux500's, I was wrong. It is there, the datasheet just states that you should not have to use it. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/mmci.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index f67fd4f2ab48..0b4a5bf0ec2c 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -101,13 +101,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
if (desired) {
if (desired >= host->mclk) {
- /*
- * The ST clock divider does not like the bypass bit,
- * even though it's available. Instead the datasheet
- * recommends setting the divider to zero.
- */
- if (!variant->st_clkdiv)
- clk = MCI_CLK_BYPASS;
+ clk = MCI_CLK_BYPASS;
host->cclk = host->mclk;
} else if (variant->st_clkdiv) {
/*