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authorChristian Löhle <CLoehle@hyperstone.com>2021-09-16 07:59:19 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2021-10-12 10:21:17 +0200
commit43592c8736e84025d7a45e61a46c3fa40536a364 (patch)
treec5081b0f084568486906ce48d430895d34f579d8 /drivers/mmc
parentdt-bindings: mmc: sdhci-msm: Add compatible string for msm8226 (diff)
downloadlinux-43592c8736e84025d7a45e61a46c3fa40536a364.tar.xz
linux-43592c8736e84025d7a45e61a46c3fa40536a364.zip
mmc: dw_mmc: Dont wait for DRTO on Write RSP error
Only wait for DRTO on reads, otherwise the driver hangs. The driver prevents sending CMD12 on response errors like CRCs. According to the comment this is because some cards have problems with this during the UHS tuning sequence. Unfortunately this workaround currently also applies for any command with data. On reads this will set the drto timer, which then triggers after a while. On writes this will not set any timer and the tasklet will not be scheduled again. I cannot test for the UHS workarounds need, but even if so, it should at most apply to reads. I have observed many hangs when CMD25 response contained a CRC error. This patch fixes this without touching the actual UHS tuning workaround. Signed-off-by: Christian Loehle <cloehle@hyperstone.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/af8f8b8674ba4fcc9a781019e4aeb72c@hyperstone.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/dw_mmc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 380f9aa56eb2..1e8f1bb3cad7 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -2086,7 +2086,8 @@ static void dw_mci_tasklet_func(struct tasklet_struct *t)
* delayed. Allowing the transfer to take place
* avoids races and keeps things simple.
*/
- if (err != -ETIMEDOUT) {
+ if (err != -ETIMEDOUT &&
+ host->dir_status == DW_MCI_RECV_STATUS) {
state = STATE_SENDING_DATA;
continue;
}