diff options
| author | yangbo lu <yangbo.lu@nxp.com> | 2017-08-15 04:16:47 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-08-30 15:03:36 +0200 |
| commit | 501639bf2173ec142c48e67d391833a54965c912 (patch) | |
| tree | d577774a9f2743de175af708fe08da636f4eeccf /drivers/mmc | |
| parent | mmc: sdhci-s3c: use generic sdhci_set_bus_width() (diff) | |
| download | linux-501639bf2173ec142c48e67d391833a54965c912.tar.xz linux-501639bf2173ec142c48e67d391833a54965c912.zip | |
mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling
SD controller with SDHCI_QUIRK_NO_HISPD_BIT quirk probably
use high speed enable bit for other purpose. So this bit
shouldn't be changed for high speed enabling for this type of
SD controller.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci.c | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1fda50855e31..5afc72f09a2a 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1640,19 +1640,20 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); - if ((ios->timing == MMC_TIMING_SD_HS || - ios->timing == MMC_TIMING_MMC_HS || - ios->timing == MMC_TIMING_MMC_HS400 || - ios->timing == MMC_TIMING_MMC_HS200 || - ios->timing == MMC_TIMING_MMC_DDR52 || - ios->timing == MMC_TIMING_UHS_SDR50 || - ios->timing == MMC_TIMING_UHS_SDR104 || - ios->timing == MMC_TIMING_UHS_DDR50 || - ios->timing == MMC_TIMING_UHS_SDR25) - && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) - ctrl |= SDHCI_CTRL_HISPD; - else - ctrl &= ~SDHCI_CTRL_HISPD; + if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { + if (ios->timing == MMC_TIMING_SD_HS || + ios->timing == MMC_TIMING_MMC_HS || + ios->timing == MMC_TIMING_MMC_HS400 || + ios->timing == MMC_TIMING_MMC_HS200 || + ios->timing == MMC_TIMING_MMC_DDR52 || + ios->timing == MMC_TIMING_UHS_SDR50 || + ios->timing == MMC_TIMING_UHS_SDR104 || + ios->timing == MMC_TIMING_UHS_DDR50 || + ios->timing == MMC_TIMING_UHS_SDR25) + ctrl |= SDHCI_CTRL_HISPD; + else + ctrl &= ~SDHCI_CTRL_HISPD; + } if (host->version >= SDHCI_SPEC_300) { u16 clk, ctrl_2; |