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authorSai Krishna Potthuri <sai.krishna.potthuri@amd.com>2023-04-03 12:25:51 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2023-04-17 09:46:53 +0200
commit9fab93895fb6f4309b2e0a2e03a87da7d4dad643 (patch)
treee882056f988aa3d59e740e13ee6562e11a0d0a63 /drivers/mmc
parentmmc: sdhci-of-arasan: Add support for eMMC5.1 on Xilinx Versal Net platform (diff)
downloadlinux-9fab93895fb6f4309b2e0a2e03a87da7d4dad643.tar.xz
linux-9fab93895fb6f4309b2e0a2e03a87da7d4dad643.zip
mmc: sdhci-of-arasan: Skip setting clock delay for 400KHz
Clock delay settings are not defined for 400KHz, so add frequency check to skip calling the clock delay settings when frequency is <=400KHz. Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230403102551.3763054-4-sai.krishna.potthuri@amd.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-of-arasan.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 20aa08484315..294dd605fd2b 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -406,7 +406,7 @@ static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
}
/* Set the Input and Output Clock Phase Delays */
- if (clk_data->set_clk_delays)
+ if (clk_data->set_clk_delays && clock > PHY_CLK_TOO_SLOW_HZ)
clk_data->set_clk_delays(host);
if (sdhci_arasan->internal_phy_reg && clock >= MIN_PHY_CLK_HZ) {