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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 03:56:37 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 03:56:37 +0100
commit0e47c969c65e213421450c31043353ebe3c67e0c (patch)
tree5057541fd3dc3521cb0946880d6925f1185dc7b7 /drivers/mtd/bcm47xxpart.c
parentMerge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cool... (diff)
parentmtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf (diff)
downloadlinux-0e47c969c65e213421450c31043353ebe3c67e0c.tar.xz
linux-0e47c969c65e213421450c31043353ebe3c67e0c.zip
Merge tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris: - Add me (Brian Norris) as an additional MTD maintainer (it'd be nice to get David's "ack" for this; I'm sure he approves, but he's been pretty silent lately) - Add Ezequiel Garcie as maintainer for the pxa3xx NAND driver - Last (?) round of pxa3xx improvements for supporting Armada 370/XP - Typical churn in driver boilerplate (OOM messages, printk()'s, devm_*, etc.) - Quad read mode support for SPI NOR driver (m25p80) - Update Davinci NAND driver to prepare for use on new platforms - Begin to kill off NAND_MAX_{PAGE,OOB}SIZE macros; more work is pending - Miscellaneous NAND device support (new IDs) - Add READ RETRY support for Micron MLC NAND - Support new GPMI NAND ECC layout device-tree binding - Avoid mapping stack/vmalloc() memory for GPMI NAND DMA * tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd: (151 commits) mtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf mtd: gpmi: allocate a proper buffer for non ECC read/write mtd: m25p80: Set rx_nbits for Quad SPI transfers mtd: m25p80: Enable Quad SPI read transfers for s25fl512s mtd: s3c2410: Merge plat/regs-nand.h into s3c2410.c mtd: mtdram: add missing 'const' mtd: m25p80: assign default read command mtd: nuc900_nand: remove redundant return value check of platform_get_resource() mtd: plat_nand: remove redundant return value check of platform_get_resource() mtd: nand: add Intel manufacturer ID mtd: nand: add SanDisk manufacturer ID mtd: nand: add support for Samsung K9LCG08U0B mtd: nand: pxa3xx: Add support for 2048 bytes page size devices mtd: m25p80: Use OPCODE_QUAD_READ_4B for 4-byte addressing mtd: nand: don't use {read,write}_buf for 8-bit transfers mtd: nand: use __packed shorthand mtd: nand: support Micron READ RETRY mtd: nand: add generic READ RETRY support mtd: nand: add ONFI vendor block for Micron mtd: nand: localize ECC failures per page ...
Diffstat (limited to 'drivers/mtd/bcm47xxpart.c')
-rw-r--r--drivers/mtd/bcm47xxpart.c27
1 files changed, 23 insertions, 4 deletions
diff --git a/drivers/mtd/bcm47xxpart.c b/drivers/mtd/bcm47xxpart.c
index 7a6384b0962a..de1eb92e42f5 100644
--- a/drivers/mtd/bcm47xxpart.c
+++ b/drivers/mtd/bcm47xxpart.c
@@ -23,10 +23,12 @@
* Amount of bytes we read when analyzing each block of flash memory.
* Set it big enough to allow detecting partition and reading important data.
*/
-#define BCM47XXPART_BYTES_TO_READ 0x404
+#define BCM47XXPART_BYTES_TO_READ 0x4e8
/* Magics */
#define BOARD_DATA_MAGIC 0x5246504D /* MPFR */
+#define BOARD_DATA_MAGIC2 0xBD0D0BBD
+#define CFE_MAGIC 0x43464531 /* 1EFC */
#define FACTORY_MAGIC 0x59544346 /* FCTY */
#define POT_MAGIC1 0x54544f50 /* POTT */
#define POT_MAGIC2 0x504f /* OP */
@@ -102,8 +104,9 @@ static int bcm47xxpart_parse(struct mtd_info *master,
continue;
}
- /* CFE has small NVRAM at 0x400 */
- if (buf[0x400 / 4] == NVRAM_HEADER) {
+ /* Magic or small NVRAM at 0x400 */
+ if ((buf[0x4e0 / 4] == CFE_MAGIC && buf[0x4e4 / 4] == CFE_MAGIC) ||
+ (buf[0x400 / 4] == NVRAM_HEADER)) {
bcm47xxpart_add_part(&parts[curr_part++], "boot",
offset, MTD_WRITEABLE);
continue;
@@ -190,6 +193,21 @@ static int bcm47xxpart_parse(struct mtd_info *master,
offset, 0);
continue;
}
+
+ /* Read middle of the block */
+ if (mtd_read(master, offset + 0x8000, 0x4,
+ &bytes_read, (uint8_t *)buf) < 0) {
+ pr_err("mtd_read error while parsing (offset: 0x%X)!\n",
+ offset);
+ continue;
+ }
+
+ /* Some devices (ex. WNDR3700v3) don't have a standard 'MPFR' */
+ if (buf[0x000 / 4] == BOARD_DATA_MAGIC2) {
+ bcm47xxpart_add_part(&parts[curr_part++], "board_data",
+ offset, MTD_WRITEABLE);
+ continue;
+ }
}
/* Look for NVRAM at the end of the last block. */
@@ -243,7 +261,8 @@ static struct mtd_part_parser bcm47xxpart_mtd_parser = {
static int __init bcm47xxpart_init(void)
{
- return register_mtd_parser(&bcm47xxpart_mtd_parser);
+ register_mtd_parser(&bcm47xxpart_mtd_parser);
+ return 0;
}
static void __exit bcm47xxpart_exit(void)