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| author | Stefan Roese <sr@denx.de> | 2012-08-28 11:34:13 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-09-29 16:29:08 +0200 |
| commit | 7be1f6b9a1ae3476a424380b52aad7c14c3273ab (patch) | |
| tree | 0d005f8a83ad814b37ec75e72784d658b9b95e85 /drivers/mtd/chips | |
| parent | mtd: nand: Added a device flag for subpage read support (diff) | |
| download | linux-7be1f6b9a1ae3476a424380b52aad7c14c3273ab.tar.xz linux-7be1f6b9a1ae3476a424380b52aad7c14c3273ab.zip | |
mtd: cfi_cmdset_0001: Fix problem with unlocking timeout
Unlocking may take up to 1.4 seconds on some Intel flashes. So
lets use a max. of 1.5 seconds (1500ms) as timeout.
See "Clear Block Lock-Bits Time" on page 40 in
"3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual
from February 2003
This patch also fixes some other problems with this timeout:
- Don't use HZ in timeout "calculation"!
While testing we noticed that an unlocking timeout occured with
HZ=1000 and didn't occur with HZ=300. This was because the
timeout parameter was calculated differently depending on the
HZ value. Now a fixed value of 1500ms is used.
- The last parameter of WAIT_TIMEOUT (defined to
inval_cache_and_wait_for_operation) has to be passed in
micro-seconds. So multiply the ms value with 1000 and not 100
to calculate this value.
- Use variable name "mdelay" instead of misleading "udelay".
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Stephan Gatzka <stephan@gatzka.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/chips')
| -rw-r--r-- | drivers/mtd/chips/cfi_cmdset_0001.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index dbbd2edfb812..77514430f1fe 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -2043,7 +2043,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip { struct cfi_private *cfi = map->fldrv_priv; struct cfi_pri_intelext *extp = cfi->cmdset_priv; - int udelay; + int mdelay; int ret; adr += chip->start; @@ -2072,9 +2072,17 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip * If Instant Individual Block Locking supported then no need * to delay. */ - udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0; + /* + * Unlocking may take up to 1.4 seconds on some Intel flashes. So + * lets use a max of 1.5 seconds (1500ms) as timeout. + * + * See "Clear Block Lock-Bits Time" on page 40 in + * "3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual + * from February 2003 + */ + mdelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1500 : 0; - ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100); + ret = WAIT_TIMEOUT(map, chip, adr, mdelay, mdelay * 1000); if (ret) { map_write(map, CMD(0x70), adr); chip->state = FL_STATUS; |