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authorDan Williams <dan.j.williams@intel.com>2009-09-09 02:55:54 +0200
committerDan Williams <dan.j.williams@intel.com>2009-09-09 02:55:54 +0200
commit9134d02bc0af4a8747d448d1f811ec5f8eb96df6 (patch)
tree704c3e5dcc10f360815c4868a74711f82fb62e27 /drivers/mtd/devices/m25p80.c
parentMerge branch 'dmaengine' into async-tx-next (diff)
parentFix new incorrect error return from do_md_stop. (diff)
downloadlinux-9134d02bc0af4a8747d448d1f811ec5f8eb96df6.tar.xz
linux-9134d02bc0af4a8747d448d1f811ec5f8eb96df6.zip
Merge commit 'md/for-linus' into async-tx-next
Conflicts: drivers/md/raid5.c
Diffstat (limited to 'drivers/mtd/devices/m25p80.c')
-rw-r--r--drivers/mtd/devices/m25p80.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 59c46126a5ce..ae5fe91867e1 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -54,7 +54,7 @@
#define SR_SRWD 0x80 /* SR write protect */
/* Define max times to check status register before we give up. */
-#define MAX_READY_WAIT_JIFFIES (10 * HZ) /* eg. M25P128 specs 6s max sector erase */
+#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
#define CMD_SIZE 4
#ifdef CONFIG_M25PXX_USE_FAST_READ