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authorLinus Walleij <linus.walleij@linaro.org>2017-08-08 21:05:10 +0200
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-08-15 14:00:47 +0200
commit2acc717b7a196c355f3a126a9ac4e9df784113e7 (patch)
treeda113029cf6ac5522c91eb12c5af9e8c32bfeda9 /drivers/mtd/maps
parentmtd: physmap_of: Fix resources leak in 'of_flash_probe()' (diff)
downloadlinux-2acc717b7a196c355f3a126a9ac4e9df784113e7.tar.xz
linux-2acc717b7a196c355f3a126a9ac4e9df784113e7.zip
mtd: physmap_of: Retire Gemini pad control
I wrote a proper pin control driver for the Gemini. Retire this SoC-specific pad control and rely on the pin controller to manage this. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/maps')
-rw-r--r--drivers/mtd/maps/physmap_of_gemini.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/drivers/mtd/maps/physmap_of_gemini.c b/drivers/mtd/maps/physmap_of_gemini.c
index 05b286b5289f..4ed1a6bb4d3c 100644
--- a/drivers/mtd/maps/physmap_of_gemini.c
+++ b/drivers/mtd/maps/physmap_of_gemini.c
@@ -43,13 +43,6 @@
#define FLASH_PARALLEL_HIGH_PIN_CNT (1 << 20) /* else low pin cnt */
-/* Miscellaneous Control Register */
-#define GLOBAL_MISC_CTRL 0x30
-#define FLASH_PADS_MASK 0x07
-#define NAND_PADS_DISABLE BIT(2)
-#define PFLASH_PADS_DISABLE BIT(1)
-#define SFLASH_PADS_DISABLE BIT(0)
-
static const struct of_device_id syscon_match[] = {
{ .compatible = "cortina,gemini-syscon" },
{ },
@@ -102,15 +95,6 @@ int of_flash_probe_gemini(struct platform_device *pdev,
map->bankwidth * 8);
}
- /* Activate parallel (NOR flash) mode */
- ret = regmap_update_bits(rmap, GLOBAL_MISC_CTRL,
- FLASH_PADS_MASK,
- SFLASH_PADS_DISABLE | NAND_PADS_DISABLE);
- if (ret) {
- dev_err(dev, "unable to set up physmap pads\n");
- return -ENODEV;
- }
-
dev_info(&pdev->dev, "initialized Gemini-specific physmap control\n");
return 0;