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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-04-02 06:03:09 +0200 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-04-18 08:54:04 +0200 |
commit | 2dcfc7b3c8992093121056c8dae1b63a652948e4 (patch) | |
tree | 4f845f48a149953c284b2fed648e861f49a82b01 /drivers/mtd/nand/raw | |
parent | mtd: rawnand: denali: remove DENALI_NR_BANKS macro (diff) | |
download | linux-2dcfc7b3c8992093121056c8dae1b63a652948e4.tar.xz linux-2dcfc7b3c8992093121056c8dae1b63a652948e4.zip |
mtd: rawnand: denali: clean up coding style
Eliminate the following reports from 'scripts/checkpatch.pl --strict'.
CHECK: Prefer kernel type 'u8' over 'uint8_t'
CHECK: Prefer kernel type 'u32' over 'uint32_t'
CHECK: Alignment should match open parenthesis
I slightly changed denali_check_erased_page() to shorten it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd/nand/raw')
-rw-r--r-- | drivers/mtd/nand/raw/denali.c | 54 |
1 files changed, 26 insertions, 28 deletions
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index 52b704c58eaf..3102ddbd8abd 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -106,7 +106,7 @@ static void denali_disable_irq(struct denali_controller *denali) } static void denali_clear_irq(struct denali_controller *denali, - int bank, uint32_t irq_status) + int bank, u32 irq_status) { /* write one to clear bits */ iowrite32(irq_status, denali->reg + INTR_STATUS(bank)); @@ -124,7 +124,7 @@ static irqreturn_t denali_isr(int irq, void *dev_id) { struct denali_controller *denali = dev_id; irqreturn_t ret = IRQ_NONE; - uint32_t irq_status; + u32 irq_status; int i; spin_lock(&denali->irq_lock); @@ -163,7 +163,7 @@ static void denali_reset_irq(struct denali_controller *denali) static u32 denali_wait_for_irq(struct denali_controller *denali, u32 irq_mask) { unsigned long time_left, flags; - uint32_t irq_status; + u32 irq_status; spin_lock_irqsave(&denali->irq_lock, flags); @@ -411,20 +411,17 @@ static int denali_check_erased_page(struct nand_chip *chip, u8 *buf, { struct denali_controller *denali = to_denali_controller(chip); struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; - uint8_t *ecc_code = chip->oob_poi + denali->oob_skip_bytes; - int ecc_steps = chip->ecc.steps; - int ecc_size = chip->ecc.size; - int ecc_bytes = chip->ecc.bytes; + struct nand_ecc_ctrl *ecc = &chip->ecc; + u8 *ecc_code = chip->oob_poi + denali->oob_skip_bytes; int i, stat; - for (i = 0; i < ecc_steps; i++) { + for (i = 0; i < ecc->steps; i++) { if (!(uncor_ecc_flags & BIT(i))) continue; - stat = nand_check_erased_ecc_chunk(buf, ecc_size, - ecc_code, ecc_bytes, - NULL, 0, - chip->ecc.strength); + stat = nand_check_erased_ecc_chunk(buf, ecc->size, ecc_code, + ecc->bytes, NULL, 0, + ecc->strength); if (stat < 0) { ecc_stats->failed++; } else { @@ -432,8 +429,8 @@ static int denali_check_erased_page(struct nand_chip *chip, u8 *buf, max_bitflips = max_t(unsigned int, max_bitflips, stat); } - buf += ecc_size; - ecc_code += ecc_bytes; + buf += ecc->size; + ecc_code += ecc->bytes; } return max_bitflips; @@ -445,7 +442,7 @@ static int denali_hw_ecc_fixup(struct nand_chip *chip, struct denali_controller *denali = to_denali_controller(chip); struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; int bank = denali->active_bank; - uint32_t ecc_cor; + u32 ecc_cor; unsigned int max_bitflips; ecc_cor = ioread32(denali->reg + ECC_COR_INFO(bank)); @@ -475,18 +472,18 @@ static int denali_hw_ecc_fixup(struct nand_chip *chip, } static int denali_sw_ecc_fixup(struct nand_chip *chip, - unsigned long *uncor_ecc_flags, uint8_t *buf) + unsigned long *uncor_ecc_flags, u8 *buf) { struct denali_controller *denali = to_denali_controller(chip); struct mtd_ecc_stats *ecc_stats = &nand_to_mtd(chip)->ecc_stats; unsigned int ecc_size = chip->ecc.size; unsigned int bitflips = 0; unsigned int max_bitflips = 0; - uint32_t err_addr, err_cor_info; + u32 err_addr, err_cor_info; unsigned int err_byte, err_sector, err_device; - uint8_t err_cor_value; + u8 err_cor_value; unsigned int prev_sector = 0; - uint32_t irq_status; + u32 irq_status; denali_reset_irq(denali); @@ -551,7 +548,7 @@ static int denali_sw_ecc_fixup(struct nand_chip *chip, static void denali_setup_dma64(struct denali_controller *denali, dma_addr_t dma_addr, int page, bool write) { - uint32_t mode; + u32 mode; const int page_count = 1; mode = DENALI_MAP10 | DENALI_BANK(denali) | page; @@ -576,7 +573,7 @@ static void denali_setup_dma64(struct denali_controller *denali, static void denali_setup_dma32(struct denali_controller *denali, dma_addr_t dma_addr, int page, bool write) { - uint32_t mode; + u32 mode; const int page_count = 1; mode = DENALI_MAP10 | DENALI_BANK(denali); @@ -601,7 +598,7 @@ static int denali_pio_read(struct denali_controller *denali, u32 *buf, size_t size, int page) { u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page; - uint32_t irq_status, ecc_err_mask; + u32 irq_status, ecc_err_mask; int i; if (denali->caps & DENALI_CAP_HW_ECC_FIXUP) @@ -628,7 +625,7 @@ static int denali_pio_write(struct denali_controller *denali, const u32 *buf, size_t size, int page) { u32 addr = DENALI_MAP01 | DENALI_BANK(denali) | page; - uint32_t irq_status; + u32 irq_status; int i; denali_reset_irq(denali); @@ -637,7 +634,8 @@ static int denali_pio_write(struct denali_controller *denali, const u32 *buf, denali->host_write(denali, addr, buf[i]); irq_status = denali_wait_for_irq(denali, - INTR__PROGRAM_COMP | INTR__PROGRAM_FAIL); + INTR__PROGRAM_COMP | + INTR__PROGRAM_FAIL); if (!(irq_status & INTR__PROGRAM_COMP)) return -EIO; @@ -657,7 +655,7 @@ static int denali_dma_xfer(struct denali_controller *denali, void *buf, size_t size, int page, bool write) { dma_addr_t dma_addr; - uint32_t irq_mask, irq_status, ecc_err_mask; + u32 irq_mask, irq_status, ecc_err_mask; enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE; int ret = 0; @@ -723,7 +721,7 @@ static int denali_page_xfer(struct nand_chip *chip, void *buf, size_t size, return denali_pio_xfer(denali, buf, size, page, write); } -static int denali_read_page(struct nand_chip *chip, uint8_t *buf, +static int denali_read_page(struct nand_chip *chip, u8 *buf, int oob_required, int page) { struct denali_controller *denali = to_denali_controller(chip); @@ -756,7 +754,7 @@ static int denali_read_page(struct nand_chip *chip, uint8_t *buf, return stat; } -static int denali_write_page(struct nand_chip *chip, const uint8_t *buf, +static int denali_write_page(struct nand_chip *chip, const u8 *buf, int oob_required, int page) { struct mtd_info *mtd = nand_to_mtd(chip); @@ -774,7 +772,7 @@ static int denali_setup_data_interface(struct nand_chip *chip, int chipnr, int acc_clks, re_2_we, re_2_re, we_2_re, addr_2_data; int rdwr_en_lo, rdwr_en_hi, rdwr_en_lo_hi, cs_setup; int addr_2_data_mask; - uint32_t tmp; + u32 tmp; timings = nand_get_sdr_timings(conf); if (IS_ERR(timings)) |