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authorDavid Woodhouse <dwmw2@infradead.org>2006-10-27 13:50:04 +0200
committerDavid Woodhouse <dwmw2@infradead.org>2006-10-27 13:50:04 +0200
commitb478c775a0c306c84215a1138e49fab540b94a5d (patch)
tree9e7874588db2c4fdc0321ecc2555189c72bdf6bf /drivers/mtd/nand
parent[MTD] NAND: Reset Café controller before initialising. (diff)
downloadlinux-b478c775a0c306c84215a1138e49fab540b94a5d.tar.xz
linux-b478c775a0c306c84215a1138e49fab540b94a5d.zip
[MTD] CAFÉ NAND: Add 'slowtiming' parameter, default usedma and checkecc on
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/cafe.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/drivers/mtd/nand/cafe.c b/drivers/mtd/nand/cafe.c
index dd274c877b5e..d894c7286aab 100644
--- a/drivers/mtd/nand/cafe.c
+++ b/drivers/mtd/nand/cafe.c
@@ -58,7 +58,7 @@ struct cafe_priv {
};
-static int usedma = 0;
+static int usedma = 1;
module_param(usedma, int, 0644);
static int skipbbt = 0;
@@ -67,9 +67,12 @@ module_param(skipbbt, int, 0644);
static int debug = 0;
module_param(debug, int, 0644);
-static int checkecc = 0;
+static int checkecc = 1;
module_param(checkecc, int, 0644);
+static int slowtiming = 0;
+module_param(slowtiming, int, 0644);
+
/* Hrm. Why isn't this already conditional on something in the struct device? */
#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
@@ -604,15 +607,16 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
/* Timings from Marvell's test code (not verified or calculated by us) */
writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
-#if 1
- writel(0x01010a0a, cafe->mmio + CAFE_NAND_TIMING1);
- writel(0x24121212, cafe->mmio + CAFE_NAND_TIMING2);
- writel(0x11000000, cafe->mmio + CAFE_NAND_TIMING3);
-#else
- writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING1);
- writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2);
- writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3);
-#endif
+
+ if (!slowtiming) {
+ writel(0x01010a0a, cafe->mmio + CAFE_NAND_TIMING1);
+ writel(0x24121212, cafe->mmio + CAFE_NAND_TIMING2);
+ writel(0x11000000, cafe->mmio + CAFE_NAND_TIMING3);
+ } else {
+ writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING1);
+ writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2);
+ writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3);
+ }
writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd);
if (err) {