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authorBoris Brezillon <boris.brezillon@free-electrons.com>2016-06-15 13:09:51 +0200
committerBoris Brezillon <boris.brezillon@free-electrons.com>2016-09-23 09:35:16 +0200
commitfde85cfd2d079bdd733d7b07d9a5775a6f70f458 (patch)
tree71fde5151b6315542e5faa6bb4a080a7fdeed6ef /drivers/mtd/nand
parentmtd: nand: sunxi: Support ECC maximization (diff)
downloadlinux-fde85cfd2d079bdd733d7b07d9a5775a6f70f458.tar.xz
linux-fde85cfd2d079bdd733d7b07d9a5775a6f70f458.zip
mtd: nand: Fix nand_command_lp() for 8bits opcodes
8 bits opcodes should be followed by a single address cycle. Make the 2nd address cycle dependent of !nand_opcode_8bits(command). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/nand_base.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a74d9e4bd8b2..c06146941e16 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -745,7 +745,10 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
column >>= 1;
chip->cmd_ctrl(mtd, column, ctrl);
ctrl &= ~NAND_CTRL_CHANGE;
- chip->cmd_ctrl(mtd, column >> 8, ctrl);
+
+ /* Only ouput a single addr cycle for 8bits opcodes. */
+ if (!nand_opcode_8bits(command))
+ chip->cmd_ctrl(mtd, column >> 8, ctrl);
}
if (page_addr != -1) {
chip->cmd_ctrl(mtd, page_addr, ctrl);