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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2017-07-19 17:25:47 +0200 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@bootlin.com> | 2018-05-18 13:03:36 +0200 |
| commit | 3278aa0ec39194d3aa719919c0f366867f1266eb (patch) | |
| tree | ee04f13855e3f433417790fb120f96ddeb78e3c1 /drivers/mtd/spi-nor | |
| parent | mtd: spi-nor: intel: provide a range for poll_timout (diff) | |
| download | linux-3278aa0ec39194d3aa719919c0f366867f1266eb.tar.xz linux-3278aa0ec39194d3aa719919c0f366867f1266eb.zip | |
mtd: spi-nor: stm32-quadspi: explicitly request exclusive reset control
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Convert all drivers requesting exclusive resets to the
explicit API call so the temporary transition helpers can be removed.
No functional changes.
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'drivers/mtd/spi-nor')
| -rw-r--r-- | drivers/mtd/spi-nor/stm32-quadspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/stm32-quadspi.c b/drivers/mtd/spi-nor/stm32-quadspi.c index b3c7f6addba7..72553506a00b 100644 --- a/drivers/mtd/spi-nor/stm32-quadspi.c +++ b/drivers/mtd/spi-nor/stm32-quadspi.c @@ -656,7 +656,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) return ret; } - rstc = devm_reset_control_get(dev, NULL); + rstc = devm_reset_control_get_exclusive(dev, NULL); if (!IS_ERR(rstc)) { reset_control_assert(rstc); udelay(2); |