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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-06-08 17:04:22 +0200 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-09-23 09:35:16 +0200 |
| commit | ba78ee00e1ff84de9b3ad33edbd3ec599099ee82 (patch) | |
| tree | 161e3a423c8ae027e651ec3514a2e4abbd48f3db /drivers/mtd | |
| parent | mtd: nand: mxc: Add timing setup for v2 controllers (diff) | |
| download | linux-ba78ee00e1ff84de9b3ad33edbd3ec599099ee82.tar.xz linux-ba78ee00e1ff84de9b3ad33edbd3ec599099ee82.zip | |
mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.
In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).
Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index f39775b05779..6669dfcf9e79 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -4272,6 +4272,9 @@ static int nand_dt_init(struct nand_chip *chip) if (ecc_step > 0) chip->ecc.size = ecc_step; + if (of_property_read_bool(dn, "nand-ecc-maximize")) + chip->ecc.options |= NAND_ECC_MAXIMIZE; + return 0; } |