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authorDavid Bauer <mail@david-bauer.net>2019-12-16 01:36:46 +0100
committerTudor Ambarus <tudor.ambarus@microchip.com>2019-12-23 18:17:50 +0100
commit707745e8d4e75b638b990d67950ab292b3b8ea2a (patch)
treea69afb5cb7e128b6ff8d1effe8dbb778925aa3d2 /drivers/mtd
parentmtd: spi-nor: intel-spi: Add support for Intel Jasper Lake SPI serial flash (diff)
downloadlinux-707745e8d4e75b638b990d67950ab292b3b8ea2a.tar.xz
linux-707745e8d4e75b638b990d67950ab292b3b8ea2a.zip
mtd: spi-nor: Add support for mx25r3235f
Add MTD support for the Macronix MX25R3235F SPI NOR chip from Macronix. The chip has 4MB of total capacity, divided into a total of 64 sectors, each 64KB sized. The chip also supports 4KB large sectors. Additionally, it supports dual and quad read modes. Functionality was verified on an HPE/Aruba AP-303 board. Signed-off-by: David Bauer <mail@david-bauer.net> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index e818fe405a48..addb6319fcbb 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -2456,6 +2456,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
+ { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512,