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authorYaniv Rosner <yanivr@broadcom.com>2008-08-14 00:55:28 +0200
committerDavid S. Miller <davem@davemloft.net>2008-08-14 01:04:03 +0200
commit57963ed94c27e94a7533434da5943195ea072a35 (patch)
tree295ecff7ffef1e4c4349ec04b5463ad6af9a93b4 /drivers/net/bnx2x_reg.h
parentbnx2x: No LRO without Rx checksum (diff)
downloadlinux-57963ed94c27e94a7533434da5943195ea072a35.tar.xz
linux-57963ed94c27e94a7533434da5943195ea072a35.zip
bnx2x: Link order with external PHY
Link order with external PHY When external PHY exists (second chip with the PHY to translate to another physical medium) the link with the eternal PHY and the network should be established before setting the link between the 5771x and the PHY. This is the right order and it is important when using autoneg - the link to the network should use the autoneg and the link between the two chips should be forced to the network result. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2x_reg.h')
-rw-r--r--drivers/net/bnx2x_reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index a85ff2073681..58fbeb1cf78d 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -5559,6 +5559,8 @@ Theotherbitsarereservedandshouldbezero*/
#define MDIO_PMA_REG_GEN_CTRL 0xca10
#define MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP 0x0188
#define MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET 0x018a
+#define MDIO_PMA_REG_M8051_MSGIN_REG 0xca12
+#define MDIO_PMA_REG_M8051_MSGOUT_REG 0xca13
#define MDIO_PMA_REG_ROM_VER1 0xca19
#define MDIO_PMA_REG_ROM_VER2 0xca1a
#define MDIO_PMA_REG_EDC_FFE_MAIN 0xca1b