diff options
author | Jon Mason <jdmason@kudzu.us> | 2011-06-27 09:42:49 +0200 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-06-28 06:40:44 +0200 |
commit | 6532e9cb33221a31c8514441a972486af713ad6e (patch) | |
tree | 20ed7a03e85691ff1516076af6ad76518d01d439 /drivers/net/cxgb3 | |
parent | mlx4: remove unnecessary read of PCI_CAP_ID_EXP (diff) | |
download | linux-6532e9cb33221a31c8514441a972486af713ad6e.tar.xz linux-6532e9cb33221a31c8514441a972486af713ad6e.zip |
cxgb3: remove unnecessary read of PCI_CAP_ID_EXP
The PCIE capability offset is saved during PCI bus walking. It will
remove an unnecessary search in the PCI configuration space if this
value is referenced instead of reacquiring it.
Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3')
-rw-r--r-- | drivers/net/cxgb3/common.h | 1 | ||||
-rw-r--r-- | drivers/net/cxgb3/t3_hw.c | 11 |
2 files changed, 4 insertions, 8 deletions
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h index 056ee8c831f1..df01b6343241 100644 --- a/drivers/net/cxgb3/common.h +++ b/drivers/net/cxgb3/common.h @@ -367,7 +367,6 @@ struct vpd_params { struct pci_params { unsigned int vpd_cap_addr; - unsigned int pcie_cap_addr; unsigned short speed; unsigned char width; unsigned char variant; diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index c688421da9c7..44ac2f40b644 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c @@ -3290,22 +3290,20 @@ static void config_pcie(struct adapter *adap) unsigned int fst_trn_rx, fst_trn_tx, acklat, rpllmt; pci_read_config_word(adap->pdev, - adap->params.pci.pcie_cap_addr + PCI_EXP_DEVCTL, + adap->pdev->pcie_cap + PCI_EXP_DEVCTL, &val); pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5; pci_read_config_word(adap->pdev, 0x2, &devid); if (devid == 0x37) { pci_write_config_word(adap->pdev, - adap->params.pci.pcie_cap_addr + - PCI_EXP_DEVCTL, + adap->pdev->pcie_cap + PCI_EXP_DEVCTL, val & ~PCI_EXP_DEVCTL_READRQ & ~PCI_EXP_DEVCTL_PAYLOAD); pldsize = 0; } - pci_read_config_word(adap->pdev, - adap->params.pci.pcie_cap_addr + PCI_EXP_LNKCTL, + pci_read_config_word(adap->pdev, adap->pdev->pcie_cap + PCI_EXP_LNKCTL, &val); fst_trn_tx = G_NUMFSTTRNSEQ(t3_read_reg(adap, A_PCIE_PEX_CTRL0)); @@ -3429,12 +3427,11 @@ static void get_pci_mode(struct adapter *adapter, struct pci_params *p) static unsigned short speed_map[] = { 33, 66, 100, 133 }; u32 pci_mode, pcie_cap; - pcie_cap = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); + pcie_cap = pci_pcie_cap(adapter->pdev); if (pcie_cap) { u16 val; p->variant = PCI_VARIANT_PCIE; - p->pcie_cap_addr = pcie_cap; pci_read_config_word(adapter->pdev, pcie_cap + PCI_EXP_LNKSTA, &val); p->width = (val >> 4) & 0x3f; |