diff options
author | Divy Le Ray <divy@chelsio.com> | 2009-07-07 21:48:53 +0200 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-07-08 19:54:20 +0200 |
commit | 619f05cf690149bef1f15cd0cec6a31b40d96951 (patch) | |
tree | a422044e2aea63314d4ca62e12079199250eb0fe /drivers/net/cxgb3 | |
parent | cxgb3: AQ100X phy support update (diff) | |
download | linux-619f05cf690149bef1f15cd0cec6a31b40d96951.tar.xz linux-619f05cf690149bef1f15cd0cec6a31b40d96951.zip |
cxgb3: fix phy power down
2 phys are were not getting the Global Tx disable bit set
when powered down, leading to an inconsistent link state
on peer.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3')
-rw-r--r-- | drivers/net/cxgb3/ael1002.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c index 9fe008ec9ba5..949d248b746b 100644 --- a/drivers/net/cxgb3/ael1002.c +++ b/drivers/net/cxgb3/ael1002.c @@ -224,12 +224,6 @@ static int ael1006_reset(struct cphy *phy, int wait) return t3_phy_reset(phy, MDIO_MMD_PMAPMD, wait); } -static int ael1006_power_down(struct cphy *phy, int enable) -{ - return mdio_set_flag(&phy->mdio, phy->mdio.prtad, MDIO_MMD_PMAPMD, - MDIO_CTRL1, MDIO_CTRL1_LPOWER, enable); -} - static struct cphy_ops ael1006_ops = { .reset = ael1006_reset, .intr_enable = t3_phy_lasi_intr_enable, @@ -237,7 +231,7 @@ static struct cphy_ops ael1006_ops = { .intr_clear = t3_phy_lasi_intr_clear, .intr_handler = t3_phy_lasi_intr_handler, .get_link_status = get_link_status_r, - .power_down = ael1006_power_down, + .power_down = ael1002_power_down, .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS, }; @@ -1840,7 +1834,7 @@ static struct cphy_ops qt2045_ops = { .intr_clear = t3_phy_lasi_intr_clear, .intr_handler = t3_phy_lasi_intr_handler, .get_link_status = get_link_status_x, - .power_down = ael1006_power_down, + .power_down = ael1002_power_down, .mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS, }; |