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| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-06-12 18:37:44 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-06-13 17:23:12 +0200 |
| commit | 8009df9e70330d185e02f0c447a7d19b6d3a4432 (patch) | |
| tree | fac4f5c8c9bdf272333eae94e8d689d63b1226d1 /drivers/net/dsa/mv88e6xxx/port.c | |
| parent | net: dsa: mv88e6xxx: prefix Port Association Vector macros (diff) | |
| download | linux-8009df9e70330d185e02f0c447a7d19b6d3a4432.tar.xz linux-8009df9e70330d185e02f0c447a7d19b6d3a4432.zip | |
net: dsa: mv88e6xxx: prefix Port IEEE Priority mapping macros
For implicit namespacing and clarity, prefix the common Port IEEE
Priority Remapping registers macros with MV88E6095_PORT_IEEE_PRIO.
The 88E6390 family turned the 0x18 register into a single indirect
table, document that at the same time.
Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.
Also fix the following checkpatch checks with a temporary variable:
CHECK: Alignment should match open parenthesis
#65: FILE: drivers/net/dsa/mv88e6xxx/port.c:932:
+ err = mv88e6xxx_port_ieeepmt_write(chip, port,
+ MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP,
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/port.c')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/port.c | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c index 595f842c955b..166208f062e3 100644 --- a/drivers/net/dsa/mv88e6xxx/port.c +++ b/drivers/net/dsa/mv88e6xxx/port.c @@ -900,11 +900,15 @@ int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port) int err; /* Use a direct priority mapping for all IEEE tagged frames */ - err = mv88e6xxx_port_write(chip, port, PORT_TAG_REGMAP_0123, 0x3210); + err = mv88e6xxx_port_write(chip, port, + MV88E6095_PORT_IEEE_PRIO_REMAP_0123, + 0x3210); if (err) return err; - return mv88e6xxx_port_write(chip, port, PORT_TAG_REGMAP_4567, 0x7654); + return mv88e6xxx_port_write(chip, port, + MV88E6095_PORT_IEEE_PRIO_REMAP_4567, + 0x7654); } static int mv88e6xxx_port_ieeepmt_write(struct mv88e6xxx_chip *chip, @@ -913,40 +917,39 @@ static int mv88e6xxx_port_ieeepmt_write(struct mv88e6xxx_chip *chip, { u16 reg; - reg = PORT_IEEE_PRIO_MAP_TABLE_UPDATE | + reg = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_UPDATE | table | - (pointer << PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT) | + (pointer << MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT) | data; - return mv88e6xxx_port_write(chip, port, PORT_IEEE_PRIO_MAP_TABLE, reg); + return mv88e6xxx_port_write(chip, port, + MV88E6390_PORT_IEEE_PRIO_MAP_TABLE, reg); } int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port) { int err, i; + u16 table; for (i = 0; i <= 7; i++) { - err = mv88e6xxx_port_ieeepmt_write( - chip, port, PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP, - i, (i | i << 4)); + table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP; + err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, + (i | i << 4)); if (err) return err; - err = mv88e6xxx_port_ieeepmt_write( - chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP, - i, i); + table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP; + err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i); if (err) return err; - err = mv88e6xxx_port_ieeepmt_write( - chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP, - i, i); + table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP; + err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i); if (err) return err; - err = mv88e6xxx_port_ieeepmt_write( - chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP, - i, i); + table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP; + err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i); if (err) return err; } |