diff options
| author | Heiner Kallweit <hkallweit1@gmail.com> | 2019-03-01 20:41:00 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-03-04 19:52:39 +0100 |
| commit | 72d8b4fdbfb6192cec1ce25c46020fb48b62fa1e (patch) | |
| tree | 7203201862479967c30a9096ca1fd1d99c2df106 /drivers/net/dsa/mv88e6xxx/serdes.h | |
| parent | cxgb4/chtls: Prefix adapter flags with CXGB4 (diff) | |
| download | linux-72d8b4fdbfb6192cec1ce25c46020fb48b62fa1e.tar.xz linux-72d8b4fdbfb6192cec1ce25c46020fb48b62fa1e.zip | |
net: dsa: mv88e6xxx: support in-band signalling on SGMII ports with external PHYs
If an external PHY is connected via SGMII and uses in-band signalling
then the auto-negotiated values aren't propagated to the port,
resulting in a broken link. See discussion in [0]. This patch adds
this propagation. We need to call mv88e6xxx_port_setup_mac(),
therefore export it from chip.c.
Successfully tested on a ZII DTU with 88E6390 switch and an
Aquantia AQCS109 PHY connected via SGMII to port 9.
[0] https://marc.info/?t=155130287200001&r=1&w=2
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx/serdes.h')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/serdes.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h b/drivers/net/dsa/mv88e6xxx/serdes.h index 573dce8b1eb4..c2e7eedfa9b9 100644 --- a/drivers/net/dsa/mv88e6xxx/serdes.h +++ b/drivers/net/dsa/mv88e6xxx/serdes.h @@ -69,6 +69,14 @@ #define MV88E6390_SGMII_INT_SYMBOL_ERROR BIT(8) #define MV88E6390_SGMII_INT_FALSE_CARRIER BIT(7) #define MV88E6390_SGMII_INT_STATUS 0xa002 +#define MV88E6390_SGMII_PHY_STATUS 0xa003 +#define MV88E6390_SGMII_PHY_STATUS_SPEED_MASK GENMASK(15, 14) +#define MV88E6390_SGMII_PHY_STATUS_SPEED_1000 0x8000 +#define MV88E6390_SGMII_PHY_STATUS_SPEED_100 0x4000 +#define MV88E6390_SGMII_PHY_STATUS_SPEED_10 0x0000 +#define MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL BIT(13) +#define MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID BIT(11) +#define MV88E6390_SGMII_PHY_STATUS_LINK BIT(10) int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port); int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on); |