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| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2022-02-23 15:00:47 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2022-02-25 06:31:42 +0100 |
| commit | 3d4a0a2a46ab8ff8897dfd6324edee5e8184d2c5 (patch) | |
| tree | 51c6dcc08ff233c5ceec4f7b391925f99a5f6957 /drivers/net/dsa/mv88e6xxx | |
| parent | net: dsa: qca8k: rename references to "lag" as "lag_dev" (diff) | |
| download | linux-3d4a0a2a46ab8ff8897dfd6324edee5e8184d2c5.tar.xz linux-3d4a0a2a46ab8ff8897dfd6324edee5e8184d2c5.zip | |
net: dsa: make LAG IDs one-based
The DSA LAG API will be changed to become more similar with the bridge
data structures, where struct dsa_bridge holds an unsigned int num,
which is generated by DSA and is one-based. We have a similar thing
going with the DSA LAG, except that isn't stored anywhere, it is
calculated dynamically by dsa_lag_id() by iterating through dst->lags.
The idea of encoding an invalid (or not requested) LAG ID as zero for
the purpose of simplifying checks in drivers means that the LAG IDs
passed by DSA to drivers need to be one-based too. So back-and-forth
conversion is needed when indexing the dst->lags array, as well as in
drivers which assume a zero-based index.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx/chip.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 4703506e8e85..23151287387c 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -1630,10 +1630,11 @@ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port) * FORWARD frames, which use the LAG ID as the * source port, we must translate dev/port to * the special "LAG device" in the PVT, using - * the LAG ID as the port number. + * the LAG ID (one-based) as the port number + * (zero-based). */ dev = MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK; - port = dsa_lag_id(dst, dp->lag_dev); + port = dsa_lag_id(dst, dp->lag_dev) - 1; } } @@ -6186,7 +6187,7 @@ static bool mv88e6xxx_lag_can_offload(struct dsa_switch *ds, return false; id = dsa_lag_id(ds->dst, lag_dev); - if (id < 0 || id >= ds->num_lag_ids) + if (id <= 0 || id > ds->num_lag_ids) return false; dsa_lag_foreach_port(dp, ds->dst, lag_dev) @@ -6217,7 +6218,8 @@ static int mv88e6xxx_lag_sync_map(struct dsa_switch *ds, u16 map = 0; int id; - id = dsa_lag_id(ds->dst, lag_dev); + /* DSA LAG IDs are one-based, hardware is zero-based */ + id = dsa_lag_id(ds->dst, lag_dev) - 1; /* Build the map of all ports to distribute flows destined for * this LAG. This can be either a local user port, or a DSA @@ -6361,7 +6363,8 @@ static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port, if (!mv88e6xxx_lag_can_offload(ds, lag_dev, info)) return -EOPNOTSUPP; - id = dsa_lag_id(ds->dst, lag_dev); + /* DSA LAG IDs are one-based */ + id = dsa_lag_id(ds->dst, lag_dev) - 1; mv88e6xxx_reg_lock(chip); |