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authorArun Chandran <achandran@mvista.com>2015-03-01 07:08:03 +0100
committerDavid S. Miller <davem@davemloft.net>2015-03-02 05:05:23 +0100
commitea373041bdfa0e580f09a9fbe6633cba62439430 (patch)
treefa7376b260180a33889a898a803ae40d66d8e599 /drivers/net/ethernet/cadence
parentnet: macb: Add on the fly CPU endianness detection (diff)
downloadlinux-ea373041bdfa0e580f09a9fbe6633cba62439430.tar.xz
linux-ea373041bdfa0e580f09a9fbe6633cba62439430.zip
net: macb: Properly add DMACFG bit definitions
Add *_SIZE macros for the bits ENDIA_DESC and ENDIA_PKT Signed-off-by: Arun Chandran <achandran@mvista.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/cadence')
-rw-r--r--drivers/net/ethernet/cadence/macb.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 57f0a1a7415d..83241c8ec5dc 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -230,8 +230,9 @@
#define GEM_FBLDO_OFFSET 0 /* fixed burst length for DMA */
#define GEM_FBLDO_SIZE 5
#define GEM_ENDIA_DESC_OFFSET 6 /* endian swap mode for management descriptor access */
+#define GEM_ENDIA_DESC_SIZE 1
#define GEM_ENDIA_PKT_OFFSET 7 /* endian swap mode for packet data access */
-#define GEM_ENDIA_SIZE 1
+#define GEM_ENDIA_PKT_SIZE 1
#define GEM_RXBMS_OFFSET 8 /* RX packet buffer memory size select */
#define GEM_RXBMS_SIZE 2
#define GEM_TXPBMS_OFFSET 10 /* TX packet buffer memory size select */