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author | Alexander Duyck <alexander.h.duyck@intel.com> | 2013-02-09 05:27:48 +0100 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2013-02-15 10:31:19 +0100 |
commit | 21ba6fe19370f8008d1edd9aedd6dadd7e3fa8f8 (patch) | |
tree | c6b171a04255964314d035a41c05830754a1071f /drivers/net/ethernet/intel/igb/igb.h | |
parent | igb: Refix sparse warning in igb_get_i2c_client (diff) | |
download | linux-21ba6fe19370f8008d1edd9aedd6dadd7e3fa8f8.tar.xz linux-21ba6fe19370f8008d1edd9aedd6dadd7e3fa8f8.zip |
igb: Update igb to use a path similar to ixgbe to determine when to stop Tx
After reviewing the igb and ixgbe code I realized there are a few issues in
how the code is structured. Specifically we are not checking the size of the
buffers being used in transmits and we are not using the same value to
determine when to stop or start a Tx queue. As such the code is prone to be
buggy.
This patch makes it so that we have one value DESC_NEEDED that we will use for
starting and stopping the queue. In addition we will check the size of
buffers being used when setting up a transmit so as to avoid a possible buffer
overrun if we were to receive a frame with a block of data larger than 32K in
skb->data.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igb/igb.h')
-rw-r--r-- | drivers/net/ethernet/intel/igb/igb.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h index afdb8bbcf6ce..d27edbc63923 100644 --- a/drivers/net/ethernet/intel/igb/igb.h +++ b/drivers/net/ethernet/intel/igb/igb.h @@ -139,8 +139,6 @@ struct vf_data_storage { #define IGB_RX_HDR_LEN IGB_RXBUFFER_256 #define IGB_RX_BUFSZ IGB_RXBUFFER_2048 -/* How many Tx Descriptors do we need to call netif_wake_queue ? */ -#define IGB_TX_QUEUE_WAKE 16 /* How many Rx Buffers do we bundle into one write to the hardware ? */ #define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */ @@ -169,6 +167,17 @@ enum igb_tx_flags { #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000 #define IGB_TX_FLAGS_VLAN_SHIFT 16 +/* + * The largest size we can write to the descriptor is 65535. In order to + * maintain a power of two alignment we have to limit ourselves to 32K. + */ +#define IGB_MAX_TXD_PWR 15 +#define IGB_MAX_DATA_PER_TXD (1 << IGB_MAX_TXD_PWR) + +/* Tx Descriptors needed, worst case */ +#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IGB_MAX_DATA_PER_TXD) +#define DESC_NEEDED (MAX_SKB_FRAGS + 4) + /* wrapper around a pointer to a socket buffer, * so a DMA handle can be stored along with the buffer */ struct igb_tx_buffer { |